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Versatile CMOS bio-potential amplifier for high-density neural recording applications

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dc.contributor.authorKim, J.-
dc.date.available2020-02-28T15:42:48Z-
dc.date.created2020-02-06-
dc.date.issued2014-12-04-
dc.identifier.issn0013-5194-
dc.identifier.urihttps://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/12010-
dc.description.abstractA fully-integrated low-power and area-efficient bio-potential amplifier for high-density neural recording applications is presented. Using a self-biased amplifier structure, the bio-potential amplifier can operate at a lower power with a reduced active area. The Miller capacitance and area-efficient pad techniques harnessed in the amplifier also help to dramatically shrink the area of the amplifier. This implantable bio-potential amplifier was fabricated using a 0.35 mu m CMOS process and was verified on a bench top by observing ex vivo biological signals.-
dc.language영어-
dc.language.isoen-
dc.publisherINST ENGINEERING TECHNOLOGY-IET-
dc.relation.isPartOfELECTRONICS LETTERS-
dc.subjectDESIGN-
dc.titleVersatile CMOS bio-potential amplifier for high-density neural recording applications-
dc.typeArticle-
dc.type.rimsART-
dc.description.journalClass1-
dc.identifier.wosid000345994700010-
dc.identifier.doi10.1049/el.2014.3497-
dc.identifier.bibliographicCitationELECTRONICS LETTERS, v.50, no.25, pp.1906 - 1907-
dc.identifier.scopusid2-s2.0-84928176564-
dc.citation.endPage1907-
dc.citation.startPage1906-
dc.citation.titleELECTRONICS LETTERS-
dc.citation.volume50-
dc.citation.number25-
dc.contributor.affiliatedAuthorKim, J.-
dc.type.docTypeArticle-
dc.subject.keywordPlusDESIGN-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
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