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A Novel One-Transistor Dynamic Random-Access Memory (1T DRAM) Featuring Partially Inserted Wide-Bandgap Double Barriers for High-Temperature Applications

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dc.contributor.authorKim, Myeongsun-
dc.contributor.authorHa, Jongmin-
dc.contributor.authorKwon, Ikhyeon-
dc.contributor.authorHan, Jae-Hee-
dc.contributor.authorCho, Seongjae-
dc.contributor.authorCho, Il Hwan-
dc.date.available2020-02-27T08:42:18Z-
dc.date.created2020-02-06-
dc.date.issued2018-11-
dc.identifier.issn2072-666X-
dc.identifier.urihttps://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/3117-
dc.description.abstractThese days, the demand on electronic systems operating at high temperature is increasing owing to bursting interest in applications adaptable to harsh environments on earth, as well as in the unpaved spaces in the universe. However, research on memory technologies suitable to high-temperature conditions have been seldom reported yet. In this work, a novel one-transistor dynamic random-access memory (1T DRAM) featuring the device channel with partially inserted wide-bandgap semiconductor material toward the high-temperature application is proposed and designed, and its device performances are investigated with an emphasis at 500 K. The possibilities of the program operation by impact ionization and the erase operation via drift conduction by a properly high drain voltage have been verified through a series of technology computer-aided design (TCAD) device simulations at 500 K. Analyses of the energy-band structures in the hold state reveals that the electrons stored in the channel can be effectively confined and retained by the surrounding thin wide-bandgap semiconductor barriers. Additionally, for more realistic and practical claims, transient characteristics of the proposed volatile memory device have been closely investigated quantifying the programming window and retention time. Although there is an inevitable degradation in state-1/state-0 current ratio compared with the case of room-temperature operation, the high-temperature operation capabilities of the proposed memory device at 500 K have been confirmed to fall into the regime permissible for practical use.-
dc.language영어-
dc.language.isoen-
dc.publisherMDPI-
dc.relation.isPartOfMICROMACHINES-
dc.subjectMOSFET-
dc.subjectBEHAVIOR-
dc.subject1T-DRAM-
dc.titleA Novel One-Transistor Dynamic Random-Access Memory (1T DRAM) Featuring Partially Inserted Wide-Bandgap Double Barriers for High-Temperature Applications-
dc.typeArticle-
dc.type.rimsART-
dc.description.journalClass1-
dc.identifier.wosid000451314900044-
dc.identifier.doi10.3390/mi9110581-
dc.identifier.bibliographicCitationMICROMACHINES, v.9, no.11-
dc.identifier.scopusid2-s2.0-85056102095-
dc.citation.titleMICROMACHINES-
dc.citation.volume9-
dc.citation.number11-
dc.contributor.affiliatedAuthorKwon, Ikhyeon-
dc.contributor.affiliatedAuthorHan, Jae-Hee-
dc.contributor.affiliatedAuthorCho, Seongjae-
dc.type.docTypeArticle-
dc.subject.keywordAuthorharsh environment-
dc.subject.keywordAuthorspace application-
dc.subject.keywordAuthor1T DRAM-
dc.subject.keywordAuthorwide-bandgap semiconductor-
dc.subject.keywordAuthorhigh-temperature operation-
dc.subject.keywordAuthorTCAD-
dc.subject.keywordPlusMOSFET-
dc.subject.keywordPlusBEHAVIOR-
dc.subject.keywordPlus1T-DRAM-
dc.relation.journalResearchAreaScience & Technology - Other Topics-
dc.relation.journalResearchAreaInstruments & Instrumentation-
dc.relation.journalWebOfScienceCategoryNanoscience & Nanotechnology-
dc.relation.journalWebOfScienceCategoryInstruments & Instrumentation-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
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