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Optimized IoT Cryptoprocessor Based on QC-MPDC Key Encapsulation Mechanism

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dc.contributor.authorPhoon, Jun-Hoe-
dc.contributor.authorLee, Wai-Kong-
dc.contributor.authorWong, Denis C. -K.-
dc.contributor.authorYap, Wun-She-
dc.contributor.authorGoi, Bok-Min-
dc.contributor.authorPhan, Raphael C. -W.-
dc.date.available2020-10-20T00:59:39Z-
dc.date.created2020-10-12-
dc.date.issued2020-09-
dc.identifier.issn2327-4662-
dc.identifier.urihttps://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/78329-
dc.description.abstractThe key encapsulation mechanism (KEM) is an important cryptographic tool to protect communication in the Internet of Things (IoT). In the near future, classical algorithms used to construct KEMs, such as RSA and elliptic curve cryptography, will be vulnerable to attacks from quantum computers. Recently, Yamada et al. proposed the quasicyclic medium density parity check (QC-MDPC) KEM, which is considered one of the most advanced code-based cryptosystems to resist quantum attacks. In this article, an optimized implementation of QC-MDPC KEM for IoT applications is presented. Our main contributions are threefold: 1) the fastest QC-MDPC McEliece decryption in field-programmable gate array (FPGA); 2) the first QC-MDPC KEM implementation in FPGA; and 3) the first iteration count attack-resistant QC-MDPC decoder in FPGA. To improve the decryption speed, we introduce a novel customized rotation engine (CRE) and incorporated several recent techniques reported in the literature, including adaptive threshold and Hamming weight estimation. The best-achieved throughput in our implementation on Xilinx Virtex 7 FPGA is 12.7% faster than the state-of-the-art result reported by Heyse et al. The proposed CRE was then integrated with QC-MDPC KEM to produce a fast and secure KEM. Furthermore, to prevent timing attacks demonstrated recently, a constant-time implementation of the QC-MDPC McEliece decoder was presented.-
dc.language영어-
dc.language.isoen-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.relation.isPartOfIEEE INTERNET OF THINGS JOURNAL-
dc.titleOptimized IoT Cryptoprocessor Based on QC-MPDC Key Encapsulation Mechanism-
dc.typeArticle-
dc.type.rimsART-
dc.description.journalClass1-
dc.identifier.wosid000571765000056-
dc.identifier.doi10.1109/JIOT.2020.2991334-
dc.identifier.bibliographicCitationIEEE INTERNET OF THINGS JOURNAL, v.7, no.9, pp.8513 - 8524-
dc.identifier.scopusid2-s2.0-85092147944-
dc.citation.endPage8524-
dc.citation.startPage8513-
dc.citation.titleIEEE INTERNET OF THINGS JOURNAL-
dc.citation.volume7-
dc.citation.number9-
dc.contributor.affiliatedAuthorLee, Wai-Kong-
dc.type.docTypeArticle-
dc.subject.keywordAuthorField programmable gate arrays-
dc.subject.keywordAuthorDecoding-
dc.subject.keywordAuthorInternet of Things-
dc.subject.keywordAuthorPublic key-
dc.subject.keywordAuthorEncapsulation-
dc.subject.keywordAuthorLogic gates-
dc.subject.keywordAuthorCode-based cryptography-
dc.subject.keywordAuthorfield-programmable gate array (FPGA)-
dc.subject.keywordAuthorpostquantum cryptography-
dc.subject.keywordAuthorpublic-key cryptography-
dc.subject.keywordAuthorquasicyclic medium density parity check (QC-MDPC) McEliece-
dc.subject.keywordPlusMDPC-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaTelecommunications-
dc.relation.journalWebOfScienceCategoryComputer Science, Information Systems-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryTelecommunications-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
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