Overlapped Data Processing Scheme for Accelerating Training and Validation in Machine Learning
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Choi, Jinseo | - |
dc.contributor.author | Kang, Donghyun | - |
dc.date.accessioned | 2023-03-13T04:40:04Z | - |
dc.date.available | 2023-03-13T04:40:04Z | - |
dc.date.created | 2023-03-13 | - |
dc.date.issued | 2022-07 | - |
dc.identifier.issn | 2169-3536 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/87050 | - |
dc.description.abstract | For several years, machine learning (ML) technologies open up new opportunities which solve traditional problems based on a rich set of hardware resources. Unfortunately, ML technologies sometimes waste available hardware resources (e.g., CPU and GPU) because they spend a lot of time waiting for a previous step inside ML procedure. In this paper, we first study data flows of the ML procedure in detail to find avoidable performance bottlenecks. Then, we propose ol.data, the first software-based data processing scheme that aims to (1) overlap training and validation steps in one epoch or two adjacent epochs, and (2) perform validation steps in parallel, which helps to significantly improve not only the computation time but also the resource utilization. To confirm the positive effectiveness of ol.data, we implemented a convolution neural network (CNN) model with ol.data and compared it with the traditional approaches, Numpy (i.e., baseline) and tf.data on three different datasets. As a result, we confirmed that ol.data reduces the inference time by up to 41.8% and increases the utilization of CPU and GPU resources by up to 75.7% and 38.7%, respectively. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.relation.isPartOf | IEEE ACCESS | - |
dc.title | Overlapped Data Processing Scheme for Accelerating Training and Validation in Machine Learning | - |
dc.type | Article | - |
dc.type.rims | ART | - |
dc.description.journalClass | 1 | - |
dc.identifier.wosid | 000838688800001 | - |
dc.identifier.doi | 10.1109/ACCESS.2022.3189373 | - |
dc.identifier.bibliographicCitation | IEEE ACCESS, v.10, pp.72015 - 72023 | - |
dc.description.isOpenAccess | Y | - |
dc.identifier.scopusid | 2-s2.0-85134259226 | - |
dc.citation.endPage | 72023 | - |
dc.citation.startPage | 72015 | - |
dc.citation.title | IEEE ACCESS | - |
dc.citation.volume | 10 | - |
dc.contributor.affiliatedAuthor | Kang, Donghyun | - |
dc.type.docType | Article | - |
dc.subject.keywordAuthor | Training | - |
dc.subject.keywordAuthor | Graphics processing units | - |
dc.subject.keywordAuthor | Task analysis | - |
dc.subject.keywordAuthor | Data processing | - |
dc.subject.keywordAuthor | Data models | - |
dc.subject.keywordAuthor | Tensors | - |
dc.subject.keywordAuthor | Hardware | - |
dc.subject.keywordAuthor | Machine learning | - |
dc.subject.keywordAuthor | TensorFlow | - |
dc.subject.keywordAuthor | CPU | - |
dc.subject.keywordAuthor | GPU utilization | - |
dc.subject.keywordAuthor | overlapping | - |
dc.subject.keywordAuthor | multiple threads | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Telecommunications | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Information Systems | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Telecommunications | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
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