8.4-to-16-bit resolution, 1-to-16 kHz bandwidth ADC with programmable-gain functionality for multi-sensor applications
DC Field | Value | Language |
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dc.contributor.author | Rhee, C. | - |
dc.contributor.author | Kim, S. | - |
dc.date.accessioned | 2023-07-24T07:40:22Z | - |
dc.date.available | 2023-07-24T07:40:22Z | - |
dc.date.created | 2023-07-24 | - |
dc.date.issued | 2019-09 | - |
dc.identifier.issn | 0013-5194 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/88622 | - |
dc.description.abstract | A resolution-reconfigurable, bandwidth-scalable analogue-to-digital converter (ADC) with programmable-gain (PG) functionality for a multi-sensor system, which encompasses various signals such as bio-signals and battery-level, is presented. In PG and low-power mode, a PG first-order noise-shaping (NS) successive-approximation register (SAR) ADC achieves 8.4-to-10.2-bit operating up to 16 kHz while providing a gain of 1/2/4. The PG NS SAR ADC can be reconfigured as an adder and a quantiser in a delta-sigma (Delta sigma) modulator enhancing the order of the modulator for high-resolution. The third-order Delta sigma modulator achieves 16.1 bits in a bandwidth of 1 kHz. The work is implemented in a 0.18 mu m CMOS process with a 1.8 V power supply. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | INST ENGINEERING TECHNOLOGY-IET | - |
dc.relation.isPartOf | ELECTRONICS LETTERS | - |
dc.title | 8.4-to-16-bit resolution, 1-to-16 kHz bandwidth ADC with programmable-gain functionality for multi-sensor applications | - |
dc.type | Article | - |
dc.type.rims | ART | - |
dc.description.journalClass | 1 | - |
dc.identifier.wosid | 000484505300005 | - |
dc.identifier.doi | 10.1049/el.2019.1496 | - |
dc.identifier.bibliographicCitation | ELECTRONICS LETTERS, v.55, no.18, pp.982 - 983 | - |
dc.description.isOpenAccess | Y | - |
dc.identifier.scopusid | 2-s2.0-85072102398 | - |
dc.citation.endPage | 983 | - |
dc.citation.startPage | 982 | - |
dc.citation.title | ELECTRONICS LETTERS | - |
dc.citation.volume | 55 | - |
dc.citation.number | 18 | - |
dc.contributor.affiliatedAuthor | Rhee, C. | - |
dc.type.docType | Article | - |
dc.subject.keywordAuthor | CMOS integrated circuits | - |
dc.subject.keywordAuthor | analogue-digital conversion | - |
dc.subject.keywordAuthor | low-power electronics | - |
dc.subject.keywordAuthor | delta-sigma modulation | - |
dc.subject.keywordAuthor | sensor fusion | - |
dc.subject.keywordAuthor | modulators | - |
dc.subject.keywordAuthor | multisensor system | - |
dc.subject.keywordAuthor | bio-signals | - |
dc.subject.keywordAuthor | PG NS SAR ADC | - |
dc.subject.keywordAuthor | third-order delta-sigma modulator | - |
dc.subject.keywordAuthor | programmable-gain first-order noise-shaping SAR ADC | - |
dc.subject.keywordAuthor | PG first-order NS successive-approximation register analogue-to-digital converter | - |
dc.subject.keywordAuthor | voltage 1 | - |
dc.subject.keywordAuthor | 8 V | - |
dc.subject.keywordPlus | DELTA-SIGMA ADC | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
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