Design and simulation of Full-Subtractor based on Quantum-Dot cellular automata technology

Abstract

A prospective replacement for CMOS technology is Quantum-dot Cellular Automata. It has advantages such as significant size reduction, fast switching speed, extremely high device density, and low energy usage. It is used to reduce the complexity of the digital circuit' structure and to achieve a more efficient circuits. This paper focuses on the design of a Full-Subtractor. The number of cells used in the circuit structure is lowest because of the creativity in the design and the novel arrangement of quantum cells. As a result, the size of the circuit and the power loss have been reduced to a minimum compared to the circuits designed by the subtractor. The proposed structure is implemented in QCA technology as a single layer circuit. The suggested Full-Subtractor have been optimized in such a way that, compared to previous structures, has an improvement of 79.48% in cell number, 42.65% in delay, 48.65% in surface area and 68.96% in energy consumption. We utilize the QCADesigner and QCAPro tools to evaluate the performance of the proposed structure.