ScholarWorks@Gachon: Cho, Seong Jae

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Cho, Seong Jae (조성재)

IT (Major of Electronic Engineering)

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Tel 031-750-8722
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TCAD:8||synaptic device:8||Silicon:7||RRAM:6||device simulation:5||Tunneling fieldeffect transistor:4||Logic gates:4||SiGe:4||low power consumption:4||FinFET:4||Heterojunction:4||neuromorphic system:4||1T DRAM:4||Synaptic device:3||optical interconnect:3||silicon nitride:3||Si CMOS:3||synaptic transistor:3||energy efficiency:3||Tunneling FieldEffect Transistor:3||TFET:3||Switches:3||shortchannel effect (SCE):2||Silicon nitride:2||lowpower operation:2||Silicon nitride (Si3N4):2||external quantum efficiency:2||Charge Trap Flash (CTF) Memory Cells:2||Neuromorphic system:2||Neuromorphics:2||Memory Window:2||silicononinsulator:2||Neurons:2||Electric potential:2||smallsignal equivalent circuit:2||source junction:2||Memristors:2||germanium:2||Gallium nitride:2||germaniumonsilicon:2||Spacechargelimited current (SCLC):2||nanowire:2||grain boundary:2||group IV:2||Technology ComputerAided Design (TCAD):2||surface treatment:2||backendoftheline:2||bandtoband tunneling:2||hardwaredriven neuromorphic system:2||Subthreshold swing:2||heterojunction:2||capacitorless DRAM:2||optical responsivity:2||RadioFrequency:2||tunneling fieldeffect transistor:2||tunneling fieldeffect transistor (TFET):2||Depression:2||Onetransistor dynamic randomaccess memory (1T DRAM):2||Random access memory:2||InGaAs:2||highspeed operation:2||TCAD Simulation:2||Graphene:2||1TDRAM:2||GaN:2||Compound Semiconductor:2||Resistive randomaccess memory (RRAM):2||Nanoscale devices:2||Pattern recognition:2||junctionless fieldeffect transistor:2||GeSn:2||Resistiveswitching randomaccess memory:2||Transistors:2||BandtoBand Tunneling (BTBT):2||reliability:2||Tunneling:2||resistive switching:2||retention time:2||Tunneling FieldEffect Transistor (TFET):2||Junctionless:2||Tunneling fieldeffect transistor (TFET):2||MOSFET:2||low temperature:2||sensing margin:2||Neural network:2||Mathematical model:2||Polysilicon:2||Ga fraction:1||GaNonSi:1||GaN/AlGaN:1||Gallium Nitride:1||Gallium nitride (GaN):1||Games:1||Gate Capacitance:1||Gate Workfunction:1||Gate controllability:1||Gateallaround:1||Gateallaround (GAA):1||Gateallaround channel:1||Gate/Blocking Oxide Energy Barrier:1||Ge Fraction:1||Ge channel:1||GeonSi photodetector:1||Ge/GaAs:1||Ge/GaAs heterojunction:1||Germanium:1||Germanium oxide:1||Gradual reset:1||Gradual resistance switching:1||Gradual switching:1||Grain Boundary:1||Grain boundary:1||Green energy:1||HRTEM:1||HSPICE:1||Hardware:1||Hardware neuromorphic systems:1||Hardwareoriented neuromorphic computing:1||Heterogatedielectric:1||Heterojunction Structure:1||Heteromaterial Gate:1||HfO2:1||Hidden layer:1||High mobility:1||High speed:1||HighSpeed:1||HighSpeed Switching:1||Highk dielectric:1||IGZO:1||IIINitride Heterojunction:1||IIIV Compound Semiconductor:1||Impact ionization:1||InAs:1||InGaAs/Si heterojunction:1||InN/GaN:1||InP:1||Indiumgalliumzinc oxide (IGZO) memristor:1||Ions:1||JLFET:1||Junctionless FieldEffect Transistor (JLFET):1||Layered Microstructure:1||Layout:1||Lightemitting diode:1||Location of Grain Boundaries (GBS):1||Logic technology:1||Longterm potentiation (LTP):1||Low Standby Power:1||Low operating power:1||LowPower Performance:1||Lowpower (LP):1||Lowpower hardware neural network:1||Lowpower operation:1||MIS structure:1||Mediumtemperature oxidation:1||Memristor:1||Metaloxidesemiconductor (MOS) capacitor:1||Metaloxidesemiconductor fieldeffect transistor:1||Mixedmode simulation:1||MoS2 composite:1||Model:1||Model parameter:1||Monte Carlo Simulation:1||Multilevel cell (MLC):1||NAND:1||Nanowedge:1||Nanoscale transistor design:1||Nanowire:1||Nd:YVO4 Laser:1||Negative set:1||Neural networks:1||Neuromorphic:1||Neuron circuits:1||Nickel alloys:1||Nonquasistatically updated Schottky barrier height considering electrode metal:1||Normallyoff:1||Number of Grain Boundaries (GBs):1||OffState Channel Resistance:1||Onetransistor (1T) dynamic randomaccess memory (DRAM):1||Onetransistor DRAM:1||Onetransistor dynamic randomaccess memory (1TDRAM):1||Optical Confinement:1||Output power:1||PMOSFET:1||PRAM:1||Parameter Extraction:1||Performance evaluation:1||Photodetector:1||Photoluminescence:1||Physical barrier:1||Physical design:1||Physicsbased SPICE compact model via VerilogA:1||Potentiation:1||Power Device:1||Power device:1||Processinginmemory (PIM):1||Program Speed:1||Program/Erase Characteristics:1||Pulse operation:1||RF performances:1||RF sputtering:1||RPCVD:1||Radio Frequency:1||RadioFrequency (RF):1||Raman Spectrum:1||Rapid thermal oxidation (RTO):1||Recessedgate:1||Reset breakdown:1||Resistive RAM (RRAM):1||Resistive Switching:1||Resistive switching:1||Resistive switching randomaccess memory:1||Resistive switching, neuromorphic, Theoretical work:1||Resistiveswitching randomaccess memory (ReRAM):1||Resistiveswitching random access memory (RRAM):1||Retention:1||Retention time:1||Rush Hour game:1||SGST:1||SIMS:1||SONOS:1||SPICE:1||Selectivity:1||Selfrectification:1||Semiconductor devices:1||Series Resistance:1||Shell channel:1||Shortchannel Effect:1||Shortterm potentiation (STP):1||Si:1||Si CMOS Compatibility:1||Si Compatibility:1||Si compatibility:1||Si processing compatibility:1||Si processing compatibility.:1||Si0:1||Siprocessing compatibility:1||Sirich nitride (SiNx):1||Si1xGex source junction:1||Si3N4 Based RRAM:1||Si3N4based RRAM:1||SiGe modeling:1||SiGe quantum well:1||SiGe shell channel:1||SiO2:1||SiO2 Doping:1||Silicidation:1||Silicides:1||Silicon Nanowire (SNW):1||Silicon compounds:1||Silicon germanium:1||Silicon on Insulator Junctionless FieldEffect Transistor (SOIJLFET):1||Silicon oxide:1||Silicon photodetector:1||Silicononinsulator (SOI):1||Silver:1||Singular value decomposition (SVD):1||SmallSignal Modeling:1||Sn segregation:1||Spike ratedependent plasticity (SRDP):1||Stress Measurement:1||Sub5 nm GeDoped Silicon Nitride Layer:1||Switching Current:1||Switching layer:1||Switching mechanism:1||Switching process:1||Synapse device:1||Synapses:1||Synaptic plasticity:1||TCAD RF Modeling:1||TCAD device simulation:1||TCAD simulation:1||TMAH:1||Temperature effect:1||Thermal Efficiency:1||Thermal recovery:1||Thermionic emission:1||Thyristor:1||TiOx:1||Transition metal dichalcogenide:1||Tunneling barrier layer:1||UPS:1||Ultrathin body (UTB):1||Ultrathin polySi:1||Valence band offset:1||Vertical channel:1||Vertical tunneling:1||Voltage control:1||WOx RRAM:1||XPS:1||XRD:1||YParameter:1||Yparameters:1||Zinc:1||ZnO:1||ab initio calculation:1||amorphous indiumgalliumzincoxide:1||and tunnelingboost nlayer:1||atomic layer deposition:1||bidirectional domains:1||bias polarity:1||biocarbon:1||bipolar analog resistiveswitching characteristics:1||capacitor truncation:1||carrier diffusion:1||carrier mobility:1||charge centroid:1||charge distribution:1||charge loss:1||chargecarrier mobility:1||chargetrap flash:1||chemical bath deposition:1||circuit design:1||circuit simulation:1||coaxial channel:1||computer architecture:1||conduction band offset:1||conductivebridge randomaccess memory:1||contact resistance:1||continuity equation:1||coreshell dualgate:1||crosspoint array architecture:1||data processing:1||data retention:1||density function theory:1||depression:1||device optimization:1||device physics:1||device simulations:1||device structure design:1||devicecircuit cooptimization:1||effective mass:1||electronic structure:1||embedded DRAM:1||energy consumption:1||epitaxial growth:1||epitaxy:1||error function:1||extended gate:1||feedback fieldeffect transistor (FBFET):1||fin design:1||finshaped channel:1||finshaped fieldeffect transistor (FinFET):1||flash memory:1||gateallaround (GAA):1||gateinduced drain leakage (GIDL):1||germanium condensation:1||gradualswitching:1||green technology:1||hardware neuromorphic:1||hardwarebased neuromorphic system:1||hardwaredriven artificial intelligence:1||hardwaredriven neuromorphic system.:1||harsh environment:1||heterojunction fieldeffect transistor:1||heterojunction pn diode:1||heterostructure:1||heterostructures:1||high current drive:1||high hole mobility:1||high performance (HP):1||highfrequency parameters:1||highkappa/metal gate (HKMG):1||highkappa/metal gate technology:1||hightemperature operation:1||highly miniaturized transistor structure:1||hydrothermal synthesis:1||impurity:1||insitu cleaning:1||indium gallium zinc oxide (IGZO):1||interfacial layer (IL):1||internal overshoot current:1||intrinsic gate delay:1||invertedT FinFET (IT FinFET):1||ionization potential energy:1||junctionless (JL) transistor:1||junctionless fieldeffect transistor (JLFET):1||light emission patterns:1||lightemitting diode:1||linear weight tunability:1||linearized augmented place wave (LAPW):1||local partial insulator (LPI):1||localized partial insulator (LPI):1||longterm depression (LTD):1||longterm plasticity (LTP):1||longterm potentiation (LTP):1||low energy consumption:1||low power:1||low power operation:1||low thermal budget:1||lowpower:1||lowpower (LP) highspeed operation:1||lowpower (LP) performance:1||lowpower highspeed operation:1||lowpressure chemical vapor deposition:1||macro modeling:1||memory processing unit (MemPU):1||memristor:1||memristors:1||metalinsulatormetal:1||metalinsulatorsemiconductor (MIS):1||metalinsulatorsilicon:1||metallization scheme:1||middle partial insulation:1||nanowedge:1||nanocomposite electrodes:1||nanowedge resistive random access memory (RRAM):1||nanowire FET:1||nanowire channel:1||neural network:1||neuromorphic application:1||nickel silicidation:1||nonlinearity:1||nonvolatile memory (NVM):1||numerical simulation:1||onchip optical interconnect:1||onoff current ratio:1||one transistor dynamic random access memory (1TDRAM):1||onetime programmable (OTP) memory:1||onetransistor (1T) dynamic random access memory (DRAM):1||operation window:1||organic thinfilm transistors:1||pin structure:1||ptype FinFET:1||parallel data processing:1||photoluminescence:1||pnjunction diode:1||polySi:1||polySi 1TDRAM:1||polycrystalline GeSn:1||polycrystallinesilicon (polySi) channel:1||postdeposition annealing:1||potentiation:1||power transistor:1||precleaning:1||process modeling:1||processinginmemory (PIM):1||quantum well (QW):1||quantummechanical driftdiffusion models:1||quantumwell chargetrap synaptic transistor:1||radiofrequency (RF):1||rapid thermal annealing:1||recessed gate:1||reducedpressure chemical vapor deposition:1||reinforcement learning (RL):1||resistive randomaccess memory (RRAM):1||resistiveswitching random access memory (RRAM):1||retention:1||scaling:1||selector:1||selfgraded oxygen concentration:1||semifloating gate:1||semiconductor devices:1||semiconductor fabrication:1||semiconductor memories:1||semiconductor reliability:1||sensing margin (SM):1||sequential task:1||shell channel:1||short and longterm memory:1||shortchannel effects:1||shortchannel effects (SCEs):1||shortterm memory:1||shortterm plasticity (STP):1||shortterm potentiation (STP):1||shortwavelength infrared:1||silicon nitride (Si3N4):1||silicon substrate:1||silicononinsulator (SOI) FinFET:1||smallsignal analysis:1||sourceside channel:1||space application:1||spike timingdependent plasticity (STDP):1||spiketimingdependent plasticity (STDP):1||spiking neural network (SNN):1||strong gate controllability:1||sub10nm Si CMOS technology:1||sub10nm logic technology:1||subthreshold swing:1||supercapacitors:1||switching and conduction mechanism:1||switching parameters:1||synaptic device.:1||technology computeraided design (TCAD):1||technology computeraided design (TCAD) simulation:1||technology computeraided design (TCAD).:1||threedimensional (3D) architecture:1||threeterminal device:1||top electrode (TE):1||transient analysis:1||transmittance:1||triangletype LED:1||tunnel FET (TFET):1||tunneling FET (TFET):1||tunneling resistance:1||tunnelingfield effect transistor:1||ultrathin polySi channel:1||uniformity:1||valence band offset (VBO):1||valenceband offset:1||vectormatrix multiplication:1||vertical stack:1||vertical tunneling operation:1||verylargescale integration:1||wavy FinFET:1||weight linearity:1||widebandgap semiconductor:1||zinc tin oxide:1||2T TRAM:1||25% tetramethylammonium hydroxide (TMAH):1||28 nm CMOS logic:1||2D semiconductor material:1||3D TCAD:1||3D device simulation:1||3D stack array:1||3D technology computeraided design (TCAD) simulation:1||3D Vertical Structure:1||3D vertical structure:1||5:1||5Ge(0):1||Abrupt reset:1||Amorphous indium gallium zinc oxide:1||Ar bombardment:1||Arch Shape:1||Array:1||Artificial neural network (ANN):1||Atomically thin film:1||Automobile application:1||Bandtoband tunneling:1||Biological neural networks:1||Biology:1||Bipolar resistive switching:1||Bipolar switching:1||CIGS solar cell:1||CMOS Inverter Circuit:1||CMOS technology:1||CMOSCompatible:1||Capacitancevoltage (CV) characteristics:1||Capacitorless OneTransistor Dynamic RandomAccess Memory:1||Carrier Mobility:1||CdS:1||Centered island cathode:1||ChargeBased:1||Chargetrap flash memory:1||Chargetrap synaptic transistor:1||Circuit Simulation:1||Circuit model:1||Compliance current:1||Costeffective process integration:1||Crosspoint array:1||Current Model:1||Current ratio:1||CurrentVoltage Model:1||Cutoff Frequency:1||DC characteristics:1||DC compact model:1||DC magnetron sputtering:1||DRAM retention:1||Data Retention Characteristics:1||Density functional theory (DFT):1||Design optimization:1||Device Simulation:1||Device physics:1||Device simulator:1||Direct Patterning:1||Dopant concentration:1||Double Gate:1||DoubleGate Junctionless FieldEffect Transistor:1||Doublegate (DG) junctionless (JL) transistor:1||Doublegate (DG) metaloxidesemiconductor fieldeffect transistor (MOSFET):1||DrainInduced Barrier Thinning:1||Draininduced barrier thinning:1||Dualgate structure:1||Electrical doping:1||Electrochemical metallization memory:1||Electrode geometries:1||Electrodes:1||Electron Hole Bilayer (EHB):1||Electron trapping:1||ElectronHole Bilayer (EHB):1||Endurance:1||EnergyBand Diagrams:1||Enhancement mode:1||Epitaxy:1||Equivalent circuit:1||FieldEffect Transistor:1||Film thickness:1||Floatingbody MOSFET:1||Fluorination reaction:1||Formation Mechanism:1||Frequency response:1||Functional Material:1||GAA:1||GST:1||

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