Graphene surface contacts of tin disulfide transistors for switching performance improvement and contact resistance reduction

Abstract

We investigated the performance improvement of tin disulfide channel transistors by graphene contact configurations. From its two-dimensional nature, graphene can make electric contacts only at the outermost layers of the channel. For intralayer current flow, two graphene flakes are contacted at the channel's top or bottom layer. For interlayer current flow, one flake is contacted at the top and bottom of each layer. We compared the transistor performance in terms of current magnitude, mobility, and subthreshold swing between the configurations. From such observations, we deduced that device characteristics depend on resistivity or doping level of individual graphene flakes. We also found that interlayer flow excels in the on-current magnitude and the mobility, and that top-contact configuration excels in the subthreshold swing.