Minimizing Global Buffer Access in a Deep Learning Accelerator Using a Local Register File with a Rearranged Computational Sequence
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, Minjae | - |
dc.contributor.author | Zhang, Zhongfeng | - |
dc.contributor.author | Choi, Seungwon | - |
dc.contributor.author | Choi, Jungwook | - |
dc.date.accessioned | 2022-07-06T06:24:53Z | - |
dc.date.available | 2022-07-06T06:24:53Z | - |
dc.date.created | 2022-05-04 | - |
dc.date.issued | 2022-04 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/138975 | - |
dc.description.abstract | We propose a method for minimizing global buffer access within a deep learning accelerator for convolution operations by maximizing the data reuse through a local register file, thereby substituting the local register file access for the power-hungry global buffer access. To fully exploit the merits of data reuse, this study proposes a rearrangement of the computational sequence in a deep learning accelerator. Once input data are read from the global buffer, repeatedly reading the same data is performed only through the local register file, saving significant power consumption. Furthermore, different from prior works that equip local register files in each computation unit, the proposed method enables sharing a local register file along the column of the 2D computation array, saving resources and controlling overhead. The proposed accelerator is implemented on an off-the-shelf field-programmable gate array to verify the functionality and resource utilization. Then, the performance improvement of the proposed method is demonstrated relative to popular deep learning accelerators. Our evaluation indicates that the proposed deep learning accelerator reduces the number of global-buffer accesses to nearly 86.8%, consequently saving up to 72.3% of the power consumption for the input data memory access with a minor increase in resource usage compared to a conventional deep learning accelerator. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | MDPI | - |
dc.title | Minimizing Global Buffer Access in a Deep Learning Accelerator Using a Local Register File with a Rearranged Computational Sequence | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Choi, Seungwon | - |
dc.contributor.affiliatedAuthor | Choi, Jungwook | - |
dc.identifier.doi | 10.3390/s22083095 | - |
dc.identifier.scopusid | 2-s2.0-85128351043 | - |
dc.identifier.wosid | 000786834000001 | - |
dc.identifier.bibliographicCitation | SENSORS, v.22, no.8, pp.1 - 24 | - |
dc.relation.isPartOf | SENSORS | - |
dc.citation.title | SENSORS | - |
dc.citation.volume | 22 | - |
dc.citation.number | 8 | - |
dc.citation.startPage | 1 | - |
dc.citation.endPage | 24 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Chemistry | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Instruments & Instrumentation | - |
dc.relation.journalWebOfScienceCategory | Chemistry, Analytical | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Instruments & Instrumentation | - |
dc.subject.keywordPlus | NEURAL-NETWORKS | - |
dc.subject.keywordPlus | HARDWARE ACCELERATOR | - |
dc.subject.keywordPlus | DATA-FLOW | - |
dc.subject.keywordPlus | CNN | - |
dc.subject.keywordAuthor | deep learning accelerator | - |
dc.subject.keywordAuthor | field-programmable gate array (FPGA) | - |
dc.subject.keywordAuthor | local register file | - |
dc.subject.keywordAuthor | rearrangement of computational sequence | - |
dc.identifier.url | https://www.mdpi.com/1424-8220/22/8/3095 | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
222, Wangsimni-ro, Seongdong-gu, Seoul, 04763, Korea+82-2-2220-1365
COPYRIGHT © 2021 HANYANG UNIVERSITY.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.