Detailed Information

Cited 0 time in webofscience Cited 0 time in scopus
Metadata Downloads

A Novel Program Operation Scheme With Negative Bias in 3-D nand Flash Memory

Full metadata record
DC Field Value Language
dc.contributor.authorSim, Jae-Min-
dc.contributor.authorKang, Myounggon-
dc.contributor.authorSong, Yun-Heub-
dc.date.accessioned2022-07-06T11:06:06Z-
dc.date.available2022-07-06T11:06:06Z-
dc.date.issued2021-12-
dc.identifier.issn0018-9383-
dc.identifier.issn1557-9646-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/140177-
dc.description.abstractIn this article, we proposed a new program operation scheme to overcome the degradation of program window in scaling down of 3-D NAND( )flash memory. First, we investigated natural V-th shift (NVS) effect in scaled-down structure and confirmed that this effect occurs due to an increase in fringe field by adjacent read voltage. Second, we investigated programmed and erased V-th window with scaling down and confirmed that programmed and erased V-th is decreased significantly due to the NVS effect. To overcome this scaling effect, we proposed a new program operation scheme using negative bias. The proposed scheme not only improves the program window margin but also achieves voltage scaling. In addition, the proposed scheme enables multistring operation through improved self-boosting, which is a compatible scheme in full array level.-
dc.format.extent6-
dc.language영어-
dc.language.isoENG-
dc.publisherInstitute of Electrical and Electronics Engineers-
dc.titleA Novel Program Operation Scheme With Negative Bias in 3-D nand Flash Memory-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1109/TED.2021.3121648-
dc.identifier.scopusid2-s2.0-85118977082-
dc.identifier.wosid000724501000028-
dc.identifier.bibliographicCitationIEEE Transactions on Electron Devices, v.68, no.12, pp 6112 - 6117-
dc.citation.titleIEEE Transactions on Electron Devices-
dc.citation.volume68-
dc.citation.number12-
dc.citation.startPage6112-
dc.citation.endPage6117-
dc.type.docTypeArticle-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.subject.keywordPlusFlash memory-
dc.subject.keywordPlusMemory architecture-
dc.subject.keywordPlusNAND circuits-
dc.subject.keywordPlusVoltage scaling-
dc.subject.keywordPlus3-D nand flash memory-
dc.subject.keywordPlusFringe fields-
dc.subject.keywordPlusNAND flash memory-
dc.subject.keywordPlusNatural vth shift-
dc.subject.keywordPlusNegative bias-
dc.subject.keywordPlusNew projects-
dc.subject.keywordPlusOperation schemes-
dc.subject.keywordPlusProgram operation-
dc.subject.keywordPlusScaling down-
dc.subject.keywordPlusSelf-boosting operation-
dc.subject.keywordAuthor3-D nand flash memory-
dc.subject.keywordAuthorAsh-
dc.subject.keywordAuthorDry etching-
dc.subject.keywordAuthorElectric potential-
dc.subject.keywordAuthorElectron traps-
dc.subject.keywordAuthornatural Vth shift (NVS)-
dc.subject.keywordAuthornegative bias-
dc.subject.keywordAuthorprogram operation-
dc.subject.keywordAuthorReliability-
dc.subject.keywordAuthorscaling down-
dc.subject.keywordAuthorself-boosting operation.-
dc.subject.keywordAuthorTiming-
dc.subject.keywordAuthorVoltage-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/9610133-
Files in This Item
Go to Link
Appears in
Collections
서울 공과대학 > 서울 융합전자공학부 > 1. Journal Articles

qrcode

Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.

Related Researcher

Researcher Song, Yun Heub photo

Song, Yun Heub
COLLEGE OF ENGINEERING (SCHOOL OF ELECTRONIC ENGINEERING)
Read more

Altmetrics

Total Views & Downloads

BROWSE