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Investigation of the Impact of External Stress on Memory Characteristics by Modifying the Backside of Substrate

Authors
Oh, Young-TaekSim, Jae-MinNguyen Van ToanKino, HisashiOno, TakahitoTanaka, TetsuSong, Yun Heub
Issue Date
Apr-2019
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords
Curvature method; external stress; interface trap densities; mechanical stress; metal-oxide-nitride-oxide-semiconductor (MONOS) structure
Citation
IEEE TRANSACTIONS ON ELECTRON DEVICES, v.66, no.4, pp.1741 - 1746
Indexed
SCIE
SCOPUS
Journal Title
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume
66
Number
4
Start Page
1741
End Page
1746
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/14245
DOI
10.1109/TED.2019.2900155
ISSN
0018-9383
Abstract
The effects of the external stress on memory device characteristics are numerically discussed, and experimental observations are made, based on the wafer curvature method for extraction of stress. An analysis of the interface state is then performed. The external force applied to the device was controlled by depositing a metal film on the wafer backside; then, the residual stress induced on the substrate was extracted. We observed that the dangling bond generated by the residual stress increases the trap site and deteriorates the interface properties. A resulting degradation of cell characteristics occurred, including an increase in the leakage current and degradation of the memory window, featuring a reduction in the oxide/nitride/oxide trap density, which worsens as the magnitude of stress increases. From these results, we concluded that minimizing the stress is essential for retaining the cell characteristics. Especially, our results are expected to be of great help in determining the effect of external force on the memory characteristics during the back-end-of-line processing.
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COLLEGE OF ENGINEERING (SCHOOL OF ELECTRONIC ENGINEERING)
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