Memory Effect by Carrier Trapping Into V3Si Nanocrystals Among SiO2 Layers on Multi-Layered Graphene Layer

Abstract

We report the electrical characteristics and conduction mechanism of a resistive switching memory device consisting of V3Si nanocrystals embedded in the SiO2 layer on multi-layered graphene. The V3Si nanocrystals with average size of 5 nm were formed between the SiO2 layers by thin film deposition and post-annealing process at 800 degrees C for 5 s. The current values of high (HRS) and low resistance states (LRS) at 1 V were measured to be about 3.26 x 10(-9) A and 3.11 x 10(-8) A, respectively. The ratio of the HRS and LRS after applying sweeping bias of +/- 6 V appeared to be about 9.54 at 1 V. The resistance switching could originate from the effect of carrier trap and emission into the V3Si nanocrystals via the tunneling, space charge limited current, and thermionic emission mechanisms controlled by the modulation of the Fermi level of the graphene layer. The V3Si nanocrystals memory device has a strong possibility for the application of nonvolatile memory devices.