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B-3-Tree: Byte-Addressable Binary B-Tree for Persistent Memory

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dc.contributor.authorCha, Hokeun-
dc.contributor.authorNam, Moohyeon-
dc.contributor.authorJin, Kibeom-
dc.contributor.authorSeo, Jiwon-
dc.contributor.authorNam, Beomseok-
dc.date.accessioned2022-07-07T17:34:58Z-
dc.date.available2022-07-07T17:34:58Z-
dc.date.created2021-05-11-
dc.date.issued2020-08-
dc.identifier.issn1553-3077-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/145350-
dc.description.abstractIn this work, we propose B-3-tree, a hybrid index for persistent memory that leverages the byte-addressability of the in-memory index and the page locality of B-trees. As in the byte-addressable in-memory index, B-3-tree is updated by 8-byte store instructions. Also, as in disk-based index, B-3-tree is failure-atomic since it makes every 8-byte store instruction transform a consistent index into another consistent index without the help of expensive logging. Since expensive logging becomes unnecessary, the number of cacheline flush instructions required for B-3-tree is significantly reduced. Our performance study shows that B-3-tree outperforms other state-of-the-art persistent indexes in terms of insert and delete performance. While B-3-tree shows slightly worse performance for point query performance, the range query performance of B-3-tree is 2x faster than FAST and FAIR B-tree because the leaf page size of B-3-tree can be set to 8x larger than that of FAST and FAIR B-tree without degrading insertion performance. We also show that read transactions can access B-3- tree without acquiring a shared lock because B-3-tree remains always consistent while a sequence of 8-byte write operations are making changes to it. As a result, B-3-tree provides high concurrency level comparable to FAST and FAIR B-tree.-
dc.language영어-
dc.language.isoen-
dc.publisherASSOC COMPUTING MACHINERY-
dc.titleB-3-Tree: Byte-Addressable Binary B-Tree for Persistent Memory-
dc.typeArticle-
dc.contributor.affiliatedAuthorSeo, Jiwon-
dc.identifier.doi10.1145/3394025-
dc.identifier.scopusid2-s2.0-85092349191-
dc.identifier.wosid000583743600003-
dc.identifier.bibliographicCitationACM TRANSACTIONS ON STORAGE, v.16, no.3, pp.1 - 27-
dc.relation.isPartOfACM TRANSACTIONS ON STORAGE-
dc.citation.titleACM TRANSACTIONS ON STORAGE-
dc.citation.volume16-
dc.citation.number3-
dc.citation.startPage1-
dc.citation.endPage27-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalWebOfScienceCategoryComputer Science, Hardware & Architecture-
dc.relation.journalWebOfScienceCategoryComputer Science, Software Engineering-
dc.subject.keywordPlusPERFORMANCE-
dc.subject.keywordPlusSTORAGE-
dc.subject.keywordAuthorNon-volatile memory-
dc.subject.keywordAuthordata structure-
dc.subject.keywordAuthorpersistent indexing-
dc.identifier.urlhttps://dl.acm.org/doi/10.1145/3394025-
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