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Core-level DVFS for Spatial Multitasking GPUs

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dc.contributor.authorCha, Jehee-
dc.contributor.authorKim, Jiho-
dc.contributor.authorPark, Yongjun-
dc.date.accessioned2022-07-09T06:40:12Z-
dc.date.available2022-07-09T06:40:12Z-
dc.date.created2021-05-11-
dc.date.issued2019-10-
dc.identifier.issn2159-3442-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/147093-
dc.description.abstractDVFS (Dynamic voltage frequency scaling) is one of the most widely used power management technologies employed to improve the performance or minimize the power consumption by controlling voltages and frequencies in real time. When applying device-level DVFS in graphics processing units (GPUs) that support spatial multitasking, it is difficult to determine the optimal DVFS status when multiple running kernels have different characteristics. To solve the problem, we created a GPU simulator that can operate at different streaming multiprocessor frequencies according to the characteristics of the assigned kernel and compared it with a single-clock-based spatial multitasking GPU simulator.-
dc.language영어-
dc.language.isoen-
dc.publisherInstitute of Electrical and Electronics Engineers Inc.-
dc.titleCore-level DVFS for Spatial Multitasking GPUs-
dc.typeArticle-
dc.contributor.affiliatedAuthorPark, Yongjun-
dc.identifier.doi10.1109/TENCON.2018.8650072-
dc.identifier.scopusid2-s2.0-85063236818-
dc.identifier.wosid000465799100292-
dc.identifier.bibliographicCitationIEEE Region 10 Annual International Conference, Proceedings/TENCON, v.2018-October, pp.1525 - 1528-
dc.relation.isPartOfIEEE Region 10 Annual International Conference, Proceedings/TENCON-
dc.citation.titleIEEE Region 10 Annual International Conference, Proceedings/TENCON-
dc.citation.volume2018-October-
dc.citation.startPage1525-
dc.citation.endPage1528-
dc.type.rimsART-
dc.type.docTypeConference Paper-
dc.description.journalClass1-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.subject.keywordPlusComputer graphics-
dc.subject.keywordPlusDynamic frequency scaling-
dc.subject.keywordPlusMultitasking-
dc.subject.keywordPlusProgram processors-
dc.subject.keywordPlusVoltage scaling-
dc.subject.keywordPlusDVFS-
dc.subject.keywordPlusDynamic voltage frequency scaling-
dc.subject.keywordPlusGpu simulators-
dc.subject.keywordPlusPower management technology-
dc.subject.keywordPlusReal time-
dc.subject.keywordPlusSingle clock-
dc.subject.keywordPlusStreaming multiprocessors-
dc.subject.keywordPlusGraphics processing unit-
dc.subject.keywordAuthorDVFS-
dc.subject.keywordAuthorGPU-
dc.subject.keywordAuthorMultitasking-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/8650072-
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