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Work-in-Progress: Secure non-volatile memory with scratch pad memory using dual encryption Mode
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Dadzie, Thomas Haywood | - |
| dc.contributor.author | Kim, Jihye | - |
| dc.contributor.author | Oh, Hyunok | - |
| dc.date.accessioned | 2022-07-11T05:15:22Z | - |
| dc.date.available | 2022-07-11T05:15:22Z | - |
| dc.date.created | 2021-05-11 | - |
| dc.date.issued | 2018-11 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/149118 | - |
| dc.description.abstract | This paper proposes a secure non-volatile main memory (NVMM) with a scratch pad memory (SPM) management compiler to reduce the number of bit flips in NVMM. The main idea is to categorize data to write-intensive and non write-intensive, and apply the CTR mode encryption for write intensive data and the ECB mode encryption for non write intensive data. The proposed scheme is secure against deterministic chosen plaintext physical attacks. Our experimental results show that the proposed dual encryption scheme reduces the number of flipped bits by 31.8% compared with ECB mode only encryption. | - |
| dc.language | 영어 | - |
| dc.language.iso | en | - |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
| dc.title | Work-in-Progress: Secure non-volatile memory with scratch pad memory using dual encryption Mode | - |
| dc.type | Article | - |
| dc.contributor.affiliatedAuthor | Oh, Hyunok | - |
| dc.identifier.doi | 10.1109/CODESISSS.2018.8525928 | - |
| dc.identifier.scopusid | 2-s2.0-85058227967 | - |
| dc.identifier.bibliographicCitation | 2018 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2018, pp.1 - 2 | - |
| dc.relation.isPartOf | 2018 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2018 | - |
| dc.citation.title | 2018 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2018 | - |
| dc.citation.startPage | 1 | - |
| dc.citation.endPage | 2 | - |
| dc.type.rims | ART | - |
| dc.type.docType | Conference Paper | - |
| dc.description.journalClass | 1 | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.subject.keywordPlus | Code converters | - |
| dc.subject.keywordPlus | Digital storage | - |
| dc.subject.keywordPlus | Hardware | - |
| dc.subject.keywordPlus | Hardware-software codesign | - |
| dc.subject.keywordPlus | Bit-flips | - |
| dc.subject.keywordPlus | Dual encryptions | - |
| dc.subject.keywordPlus | Non-volatile main memory | - |
| dc.subject.keywordPlus | Non-volatile memory | - |
| dc.subject.keywordPlus | Physical attacks | - |
| dc.subject.keywordPlus | Scratch pad memory | - |
| dc.subject.keywordPlus | Scratch-pad memory managements | - |
| dc.subject.keywordPlus | Work in progress | - |
| dc.subject.keywordPlus | Cryptography | - |
| dc.identifier.url | https://ieeexplore.ieee.org/document/8525928 | - |
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