Two approaches towards EDZL scheduling for performance asymmetric multiprocessors
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Wu, Peng | - |
dc.contributor.author | Majeed, Shakaiba | - |
dc.contributor.author | Ryu, Minsoo | - |
dc.date.accessioned | 2022-07-14T01:47:13Z | - |
dc.date.available | 2022-07-14T01:47:13Z | - |
dc.date.created | 2021-05-11 | - |
dc.date.issued | 2017-07 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/152078 | - |
dc.description.abstract | In order to improve the performance of multi-threaded applications for real-time systems such as network servers and multimedia systems, asymmetric multiprocessors have been proposed. The benefits of improved performance and reduced power consumption from such architectures cannot be fully exploited unless suitable scheduling and task allocation methods are implemented at the operating system level. Our current research focuses on providing efficient scheduling algorithm for performance asymmetric multiprocessors used in real-time applications. Specifically, we present two approaches for real-time task allocation based on EDZL scheduling policy depending on the choice of speed of processors. The first approach chooses a fastest speed processor for high priority tasks. The second approach chooses a slowest speed processor for higher priority non-zero laxity tasks. We explain these two scheduling methods with examples and also derive schedulability tests for both approaches. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.title | Two approaches towards EDZL scheduling for performance asymmetric multiprocessors | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Ryu, Minsoo | - |
dc.identifier.doi | 10.1109/ICNIDC.2016.7974548 | - |
dc.identifier.scopusid | 2-s2.0-85027517289 | - |
dc.identifier.bibliographicCitation | Proceedings of 2016 5th International Conference on Network Infrastructure and Digital Content, IEEE IC-NIDC 2016, pp.120 - 123 | - |
dc.relation.isPartOf | Proceedings of 2016 5th International Conference on Network Infrastructure and Digital Content, IEEE IC-NIDC 2016 | - |
dc.citation.title | Proceedings of 2016 5th International Conference on Network Infrastructure and Digital Content, IEEE IC-NIDC 2016 | - |
dc.citation.startPage | 120 | - |
dc.citation.endPage | 123 | - |
dc.type.rims | ART | - |
dc.type.docType | Conference Paper | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordPlus | Digital integrated circuits | - |
dc.subject.keywordPlus | Interactive computer systems | - |
dc.subject.keywordPlus | Multimedia systems | - |
dc.subject.keywordPlus | Multiprocessing systems | - |
dc.subject.keywordPlus | Scheduling | - |
dc.subject.keywordPlus | Scheduling algorithms | - |
dc.subject.keywordPlus | Efficient scheduling | - |
dc.subject.keywordPlus | Laxity | - |
dc.subject.keywordPlus | Multi- threaded applications | - |
dc.subject.keywordPlus | Performance asymmetric multiprocessors | - |
dc.subject.keywordPlus | Real-time application | - |
dc.subject.keywordPlus | Reduced power consumption | - |
dc.subject.keywordPlus | Schedulability test | - |
dc.subject.keywordPlus | Task allocation | - |
dc.subject.keywordPlus | Real time systems | - |
dc.subject.keywordAuthor | EDZL Scheduling | - |
dc.subject.keywordAuthor | Laxity | - |
dc.subject.keywordAuthor | Performance asymmetric multiprocessors | - |
dc.subject.keywordAuthor | Task allocation | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/7974548 | - |
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