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Reducing false conflicts in signature-based eager hardware transactional memory
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kang, Jinku | - |
| dc.contributor.author | Jung, Jaeil | - |
| dc.contributor.author | Lee, Inhwan | - |
| dc.date.accessioned | 2022-07-16T02:15:54Z | - |
| dc.date.available | 2022-07-16T02:15:54Z | - |
| dc.date.issued | 2014-11 | - |
| dc.identifier.issn | 0013-5194 | - |
| dc.identifier.issn | 1350-911X | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/158767 | - |
| dc.description.abstract | The use of a conflict-address buffer (CAB) for reducing false conflicts in signature-based eager hardware transactional memory (HTM) is proposed. On the basis of the observation that most conflicts occur when accessing a very small set of addresses, the CAB captures those addresses that generate a conflict at runtime and performs more precise conflict detection for the captured addresses. Using the CAB can reduce false conflicts and the associated unnecessary transaction aborts and, consequently, improve the performance of the multicore processors that implement the signature-based eager HTM. When running the Stanford transactional applications for multiprocessing (STAMP) benchmark on a 16-core processor that implements the LogTM-SE, the speedup (decrease in execution time) achieved with a 4-entry CAB is 9.4% on average. | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | Institute of Electrical Engineers | - |
| dc.title | Reducing false conflicts in signature-based eager hardware transactional memory | - |
| dc.type | Article | - |
| dc.publisher.location | 영국 | - |
| dc.identifier.doi | 10.1049/el.2014.3375 | - |
| dc.identifier.scopusid | 2-s2.0-84915759461 | - |
| dc.identifier.wosid | 000345695100026 | - |
| dc.identifier.bibliographicCitation | Electronics Letters, v.50, no.24, pp 1821 - U185 | - |
| dc.citation.title | Electronics Letters | - |
| dc.citation.volume | 50 | - |
| dc.citation.number | 24 | - |
| dc.citation.startPage | 1821 | - |
| dc.citation.endPage | U185 | - |
| dc.type.docType | Article | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | sci | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.subject.keywordPlus | Conflict detection | - |
| dc.subject.keywordPlus | Hardware transactional memory | - |
| dc.subject.keywordPlus | Multi-core processorRuntimes | - |
| dc.identifier.url | https://ietresearch.onlinelibrary.wiley.com/doi/10.1049/el.2014.3375 | - |
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