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An ASIP approach for interpolation performance enhancement in HEVC decoder
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lee, Minkyu | - |
| dc.contributor.author | Song, Yong Ho | - |
| dc.contributor.author | Chung, Ki-Seok | - |
| dc.date.accessioned | 2022-07-16T03:30:51Z | - |
| dc.date.available | 2022-07-16T03:30:51Z | - |
| dc.date.created | 2021-05-11 | - |
| dc.date.issued | 2014-09 | - |
| dc.identifier.issn | 0000-0000 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/159281 | - |
| dc.description.abstract | In this paper, an application-specific instruction-set processor (ASIP) implementation for interpolation operation for high efficiency video coding (HEVC) decoders is proposed. HEVC is a new video compression standard that has higher compression efficiency than the previous ones. The proposed ASIP is implemented on the XRC-D2MR processor by augmenting the instruction set architecture in Xtensa Tensilica processor using Tensilica instruction extension (TIE). | - |
| dc.language | 영어 | - |
| dc.language.iso | en | - |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
| dc.title | An ASIP approach for interpolation performance enhancement in HEVC decoder | - |
| dc.type | Article | - |
| dc.contributor.affiliatedAuthor | Song, Yong Ho | - |
| dc.contributor.affiliatedAuthor | Chung, Ki-Seok | - |
| dc.identifier.doi | 10.1109/ICNIDC.2014.7000300 | - |
| dc.identifier.scopusid | 2-s2.0-84929405468 | - |
| dc.identifier.bibliographicCitation | Proceedings of 2014 4th IEEE International Conference on Network Infrastructure and Digital Content, IEEE IC-NIDC 2014, pp.232 - 235 | - |
| dc.relation.isPartOf | Proceedings of 2014 4th IEEE International Conference on Network Infrastructure and Digital Content, IEEE IC-NIDC 2014 | - |
| dc.citation.title | Proceedings of 2014 4th IEEE International Conference on Network Infrastructure and Digital Content, IEEE IC-NIDC 2014 | - |
| dc.citation.startPage | 232 | - |
| dc.citation.endPage | 235 | - |
| dc.type.rims | ART | - |
| dc.type.docType | Conference Paper | - |
| dc.description.journalClass | 1 | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.subject.keywordPlus | Application specific integrated circuits | - |
| dc.subject.keywordPlus | Decoding | - |
| dc.subject.keywordPlus | Image compression | - |
| dc.subject.keywordPlus | Interpolation | - |
| dc.subject.keywordPlus | Microprocessor chips | - |
| dc.subject.keywordPlus | Motion analysis | - |
| dc.subject.keywordPlus | Motion compensation | - |
| dc.subject.keywordPlus | Video signal processing | - |
| dc.subject.keywordPlus | Application specific instruction set processor | - |
| dc.subject.keywordPlus | ASIP | - |
| dc.subject.keywordPlus | Compression efficiency | - |
| dc.subject.keywordPlus | HEVC | - |
| dc.subject.keywordPlus | High-efficiency video coding | - |
| dc.subject.keywordPlus | Instruction set architecture | - |
| dc.subject.keywordPlus | Performance enhancements | - |
| dc.subject.keywordPlus | Video compression standards | - |
| dc.subject.keywordPlus | Computer architecture | - |
| dc.subject.keywordAuthor | ASIP | - |
| dc.subject.keywordAuthor | HEVC | - |
| dc.subject.keywordAuthor | interpolation | - |
| dc.subject.keywordAuthor | motion compensation | - |
| dc.identifier.url | https://ieeexplore.ieee.org/document/7000300 | - |
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