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Integrated write buffer management for solid state drives

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dc.contributor.authorPark, Sungmin-
dc.contributor.authorCha, Jaehyuk-
dc.contributor.authorKang, Sooyong-
dc.date.accessioned2022-07-16T05:24:03Z-
dc.date.available2022-07-16T05:24:03Z-
dc.date.created2021-05-12-
dc.date.issued2014-04-
dc.identifier.issn1383-7621-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/160297-
dc.description.abstractNAND flash memory-based Solid State Drives (SSD) have many merits, in comparison to the traditional hard disk drives (HDD). However, random write within SSD is still far slower than sequential read/write and random read. There are two independent approaches for resolving this problem as follows: (1) using overprovisioning so that reserved portion of the physical memory space can be used as, for example, log blocks, for performance enhancement, and (2) using internal write buffer (DRAM or Non-Volatile RAM) within SSD. While log blocks are managed by the Flash Translation Layer (FTL), write buffer management has been treated separately from the FTL. Write buffer management schemes did not use the exact status of log blocks, and log block management schemes in FTL did not consider the behavior of the write buffer management scheme. This paper first demonstrates that log blocks and write buffers maintain a tight relationship, which necessitates integrated management to both of them. Since log blocks can also be viewed as another type of write buffer, we can manage both of them as an integrated write buffer. Then we propose an Integrated Write buffer Management scheme (IWM), which collectively manages both the write buffer and log blocks. The proposed scheme greatly outperforms previous schemes in terms of write amplification, block erase count, and execution time.-
dc.language영어-
dc.language.isoen-
dc.publisherELSEVIER-
dc.titleIntegrated write buffer management for solid state drives-
dc.typeArticle-
dc.contributor.affiliatedAuthorCha, Jaehyuk-
dc.contributor.affiliatedAuthorKang, Sooyong-
dc.identifier.doi10.1016/j.sysarc.2014.01.005-
dc.identifier.scopusid2-s2.0-84897515871-
dc.identifier.wosid000335612100002-
dc.identifier.bibliographicCitationJOURNAL OF SYSTEMS ARCHITECTURE, v.60, no.4, pp.329 - 344-
dc.relation.isPartOfJOURNAL OF SYSTEMS ARCHITECTURE-
dc.citation.titleJOURNAL OF SYSTEMS ARCHITECTURE-
dc.citation.volume60-
dc.citation.number4-
dc.citation.startPage329-
dc.citation.endPage344-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalWebOfScienceCategoryComputer Science, Hardware & Architecture-
dc.relation.journalWebOfScienceCategoryComputer Science, Software Engineering-
dc.subject.keywordPlusFLASH-
dc.subject.keywordPlusPOLICY-
dc.subject.keywordAuthorFlash memory-
dc.subject.keywordAuthorWrite buffer-
dc.subject.keywordAuthorLog block-
dc.subject.keywordAuthorFlash translation layer-
dc.subject.keywordAuthorSolid-state disk-
dc.subject.keywordAuthorStorage device-
dc.identifier.urlhttps://www.sciencedirect.com/science/article/pii/S1383762114000216?via%3Dihub-
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