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Port Based Actor Model with Kahn Process Network Model and Decidable Dataflow Model

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dc.contributor.authorOh, Hyunok-
dc.date.accessioned2022-07-16T10:25:04Z-
dc.date.available2022-07-16T10:25:04Z-
dc.date.issued2013-04-
dc.identifier.issn1939-8018-
dc.identifier.issn1939-8115-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/163054-
dc.description.abstractThis paper proposes a transitional actor model from legacy code to decidable dataflow. In addition, the proposed actor model provides dynamic behavior and top down design with static analysis such as deadlock detection and buffer memory size computation by combining Kahn process network (KPN) model and decidable dataflow (DCDF) model. In the proposed model, each port can have its own model of computation, which is different from the existing actor based models, so that it is called port based actor (PBA) model. Each port has either Kahn process network model or decidable dataflow model. A port group for KPN ports is introduced to specify KPN ports that are internally related. The proposed port based actor model is a generalized actor model extended from constant rate dataflow with intermediate ports (CRDF-IP) in which through the intermediate ports, an actor can consume and produce samples arbitrary times per execution. The decomposition of a PBA graph into DCDF graphs allows to apply static analysis, scheduling, and code generation methods developed for DCDF model. This paper explains formal definitions and static analysis for PBA model. Moreover, scheduling and efficient code generation methods are also explained. To validate that the proposed model works, PBA model has been implemented and an H. 263 video encoder algorithm is specified and synthesized in PBA model.-
dc.format.extent14-
dc.language영어-
dc.language.isoENG-
dc.publisherSpringer Verlag-
dc.titlePort Based Actor Model with Kahn Process Network Model and Decidable Dataflow Model-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1007/s11265-012-0682-6-
dc.identifier.scopusid2-s2.0-84873730683-
dc.identifier.wosid000314776600006-
dc.identifier.bibliographicCitationJournal of Signal Processing Systems, v.71, no.1, pp 75 - 88-
dc.citation.titleJournal of Signal Processing Systems-
dc.citation.volume71-
dc.citation.number1-
dc.citation.startPage75-
dc.citation.endPage88-
dc.type.docTypeArticle-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryComputer Science, Information Systems-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.subject.keywordPlusCodes (symbols)-
dc.subject.keywordPlusComputability and decidability-
dc.subject.keywordPlusComputer programming languages-
dc.subject.keywordPlusParallel programming-
dc.subject.keywordPlusPorts and harbors-
dc.subject.keywordPlusScheduling-
dc.subject.keywordPlusScheduling algorithms-
dc.subject.keywordPlusStatic analysis-
dc.subject.keywordAuthorComputer languages-
dc.subject.keywordAuthorData flow computing-
dc.subject.keywordAuthorParallel programming-
dc.subject.keywordAuthorScheduling algorithm-
dc.subject.keywordAuthorMemory management-
dc.identifier.urlhttps://link.springer.com/article/10.1007/s11265-012-0682-6-
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