An ILP-based Worst-case Performance Analysis Technique for Distributed Real-time Embedded Systems
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Jinwoo | - |
dc.contributor.author | Oh, Hyunok | - |
dc.contributor.author | Ha, Hyojin | - |
dc.contributor.author | Kang, Shin-Haeng | - |
dc.contributor.author | Choi, Junchul | - |
dc.contributor.author | Ha, Soonhoi | - |
dc.date.accessioned | 2022-07-16T12:06:29Z | - |
dc.date.available | 2022-07-16T12:06:29Z | - |
dc.date.created | 2021-05-13 | - |
dc.date.issued | 2012-12 | - |
dc.identifier.issn | 1052-8725 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/163849 | - |
dc.description.abstract | Finding a tight upper bound of the worst-case response time in a distributed real-time embedded system is a very challenging problem since we have to consider execution time variations of tasks, jitter of input arrivals, scheduling anomaly behavior in a multi-tasking system, all together. In this paper, we translate the problem as an optimization problem and propose a novel solution based on ILP (Integer Linear Programming). In the proposed technique, we formulate a set of ILP formulas in a compositional way for modeling flexibility, but solve the problem holistically to achieve tighter upper bounds. To mitigate the time complexity of the ILP method, we perform static analysis based on a scheduling heuristic to reduce the number of variables and confine the variable ranges. Preliminary experiments with the benchmarks used in the related work and a real-life example show promising results that give tight bounds in an affordable solution time. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE | - |
dc.title | An ILP-based Worst-case Performance Analysis Technique for Distributed Real-time Embedded Systems | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Oh, Hyunok | - |
dc.identifier.doi | 10.1109/RTSS.2012.86 | - |
dc.identifier.bibliographicCitation | IEEE Real-Time Systems Symposium, pp.1 - 10 | - |
dc.relation.isPartOf | IEEE Real-Time Systems Symposium | - |
dc.citation.title | IEEE Real-Time Systems Symposium | - |
dc.citation.startPage | 1 | - |
dc.citation.endPage | 10 | - |
dc.type.rims | ART | - |
dc.type.docType | Proceeding | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | other | - |
dc.subject.keywordAuthor | worst-case performance estimation | - |
dc.subject.keywordAuthor | integer linear programming | - |
dc.subject.keywordAuthor | distributed real-time embedded system | - |
dc.subject.keywordAuthor | scheduling anomaly | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/6424818 | - |
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