Modified wirte-and-verify scheme for improving the endurance of multi-level cell phase-change memory using Ge-doped SbTe

Abstract

In this study, a modified write-and-verify (WAV) scheme is proposed for improving the programming/erasing (P/E) endurance of multi-level cell (MLC) phase-change memory (PCM) using Ge-doped SbTe (GeST). A dual reference data read method is developed to detect the level margin decay during P/E cycling, and a trigger condition is designed to trigger self-repair for the degraded cells before any P/E error for the modified WAV scheme. Experimental results suggest that the modified WAV scheme effectively extends the P/E endurance of PCM using GeST during 4-level P/E by at least 10 times. The modified WAV scheme is expected to improve the endurance of MLC-PCM of system applications.