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Leveraging Parallel Computing in Modern Video Coding Standards
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Choi, Kiho | - |
| dc.contributor.author | Jang, Euee S. | - |
| dc.date.accessioned | 2022-07-16T14:37:40Z | - |
| dc.date.available | 2022-07-16T14:37:40Z | - |
| dc.date.issued | 2012-07 | - |
| dc.identifier.issn | 1070-986X | - |
| dc.identifier.issn | 1941-0166 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/165154 | - |
| dc.description.abstract | Video coding has always been a computationally intensive process. Although dramatic improvements in coding efficiency have been realized in recent years, the algorithms have become increasingly complex and there is a broader recognition that it is necessary to realize the capabilities of multicore processors. This article discusses how recent trends in parallel computing have influenced the design of modern video coding standards. Specifically, the authors discuss how the High Efficiency Video Coding (HEVC) standard, which is being jointly developed by ISO/IEC JTC1/SC29 WG11 (MPEG) and ITU-T SH16/Q.6 (VCEG), is looking at ways to implement the co-exploration between algorithm and architecture (CEAA) approach. | - |
| dc.format.extent | 5 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | Institute of Electrical and Electronics Engineers | - |
| dc.title | Leveraging Parallel Computing in Modern Video Coding Standards | - |
| dc.type | Article | - |
| dc.publisher.location | 미국 | - |
| dc.identifier.doi | 10.1109/MMUL.2012.36 | - |
| dc.identifier.scopusid | 2-s2.0-84866240724 | - |
| dc.identifier.wosid | 000306880800002 | - |
| dc.identifier.bibliographicCitation | IEEE Multimedia, v.19, no.3, pp 7 - 11 | - |
| dc.citation.title | IEEE Multimedia | - |
| dc.citation.volume | 19 | - |
| dc.citation.number | 3 | - |
| dc.citation.startPage | 7 | - |
| dc.citation.endPage | 11 | - |
| dc.type.docType | Editorial Material | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | sci | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Computer Science | - |
| dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture | - |
| dc.relation.journalWebOfScienceCategory | Computer Science, Information Systems | - |
| dc.relation.journalWebOfScienceCategory | Computer Science, Software Engineering | - |
| dc.relation.journalWebOfScienceCategory | Computer Science, Theory & Methods | - |
| dc.subject.keywordPlus | Algorithms | - |
| dc.subject.keywordPlus | Motion Picture Experts Group standards | - |
| dc.subject.keywordPlus | Syntactics | - |
| dc.subject.keywordAuthor | CEAA | - |
| dc.subject.keywordAuthor | co-exploration between algorithm and architecture | - |
| dc.subject.keywordAuthor | HEVC | - |
| dc.subject.keywordAuthor | High Efficiency Video Coding standard | - |
| dc.subject.keywordAuthor | multicore processing | - |
| dc.subject.keywordAuthor | multimedia | - |
| dc.subject.keywordAuthor | multimedia standards | - |
| dc.subject.keywordAuthor | parallel processing | - |
| dc.subject.keywordAuthor | video coding standards | - |
| dc.identifier.url | https://ieeexplore.ieee.org/document/6272278 | - |
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