Countermeasure techniques for seed hardware modules against differential power analysis
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Yongmin | - |
dc.contributor.author | Lee, Jae Seong | - |
dc.contributor.author | Kim, Dong Kyue | - |
dc.date.accessioned | 2022-12-20T10:45:22Z | - |
dc.date.available | 2022-12-20T10:45:22Z | - |
dc.date.created | 2022-09-16 | - |
dc.date.issued | 2010-12 | - |
dc.identifier.issn | 0000-0000 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/173315 | - |
dc.description.abstract | SEED, the Korean standard block cipher algorithm, is a 128-bit symmetric key block cipher algorithm. Although SEED is theoretically safe, cryptographic devices with SEED modules are vulnerable to differential power analysis due to leakage information. Recently, differential power analysis has been widely researched, and various countermeasure techniques against differential power analysis have been proposed. In this paper, we embodied SEED hardware modules with differential power analysis countermeasure techniques using masking methods, and we generated random number using simple PRNG module. We embodied the SEED hardware modules using VHDL, and analyzed the result of simulation and synthesis. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE | - |
dc.title | Countermeasure techniques for seed hardware modules against differential power analysis | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Dong Kyue | - |
dc.identifier.doi | 10.1109/ICNIDC.2010.5657883 | - |
dc.identifier.scopusid | 2-s2.0-78651309495 | - |
dc.identifier.bibliographicCitation | Proceedings - 2010 2nd IEEE International Conference on Network Infrastructure and Digital Content, IC-NIDC 2010, pp.763 - 767 | - |
dc.relation.isPartOf | Proceedings - 2010 2nd IEEE International Conference on Network Infrastructure and Digital Content, IC-NIDC 2010 | - |
dc.citation.title | Proceedings - 2010 2nd IEEE International Conference on Network Infrastructure and Digital Content, IC-NIDC 2010 | - |
dc.citation.startPage | 763 | - |
dc.citation.endPage | 767 | - |
dc.type.rims | ART | - |
dc.type.docType | Conference Paper | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordPlus | Block cipher algorithms | - |
dc.subject.keywordPlus | Cryptographic devices | - |
dc.subject.keywordPlus | Differential power Analysis | - |
dc.subject.keywordPlus | Hardware modules | - |
dc.subject.keywordPlus | Leakage information | - |
dc.subject.keywordPlus | Power analysis attack | - |
dc.subject.keywordPlus | Random Numbers | - |
dc.subject.keywordPlus | Side channel attack | - |
dc.subject.keywordPlus | Symmetric keys | - |
dc.subject.keywordPlus | Algorithms | - |
dc.subject.keywordPlus | Computer hardware description languages | - |
dc.subject.keywordPlus | Cryptography | - |
dc.subject.keywordPlus | Random number generation | - |
dc.subject.keywordPlus | Seed | - |
dc.subject.keywordAuthor | Differential power analysis | - |
dc.subject.keywordAuthor | Power analysis attack | - |
dc.subject.keywordAuthor | SEED | - |
dc.subject.keywordAuthor | Side channel attack | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/5657883 | - |
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