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CMOS symmetric trace differential stacked spiral inductor

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dc.contributor.authorKim, J.-
dc.contributor.authorKim, H.-
dc.date.accessioned2022-12-20T16:34:33Z-
dc.date.available2022-12-20T16:34:33Z-
dc.date.created2022-08-27-
dc.date.issued2010-07-
dc.identifier.issn0013-5194-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/174510-
dc.description.abstractA miniature silicon-based symmetric trace differential stacked spiral inductor (SDSSI) has been implemented using standard 0.18 mu m CMOS technology. Based on the measured two-port S-parameter using a standard de-embedding procedure, the self-resonance frequency (f(sr)) and quality factor (Q) of the SDSSI were compared to a conventional differential stacked spiral inductor (DSSI). The f(sr) of the SDSSI was nearly 2.5 times higher than that of the DSSI, and the Q value of the SDSSI was also enhanced.-
dc.language영어-
dc.language.isoen-
dc.publisherINST ENGINEERING TECHNOLOGY-IET-
dc.titleCMOS symmetric trace differential stacked spiral inductor-
dc.typeArticle-
dc.contributor.affiliatedAuthorKim, H.-
dc.identifier.doi10.1049/el.2010.1234-
dc.identifier.scopusid2-s2.0-77954617246-
dc.identifier.wosid000279559400028-
dc.identifier.bibliographicCitationELECTRONICS LETTERS, v.46, no.14, pp.1005 - U70-
dc.relation.isPartOfELECTRONICS LETTERS-
dc.citation.titleELECTRONICS LETTERS-
dc.citation.volume46-
dc.citation.number14-
dc.citation.startPage1005-
dc.citation.endPageU70-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.identifier.urlhttps://digital-library.theiet.org/content/journals/10.1049/el.2010.1234-
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