Cited 0 time in
Electrical Width Determination of Silicon Nanowires Prepared by Using the Top-Down Method
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lee, Seong Jae | - |
| dc.date.accessioned | 2022-12-20T19:44:17Z | - |
| dc.date.available | 2022-12-20T19:44:17Z | - |
| dc.date.issued | 2009-12 | - |
| dc.identifier.issn | 0374-4884 | - |
| dc.identifier.issn | 1976-8524 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/175743 | - |
| dc.description.abstract | High-aspect-ratio nanowires of various widths and lengths (105 nm similar to 20 mu m and 2 similar to 20 mu m, respectively), but of fixed thickness (40 nm), were prepared by using the top-down method, and their resistances were measured in the two-terminal configuration. By taking into account the series resistance corresponding to the trapezoidal section of the channel connecting a nanowire to a wider electrode region, we obtained a sheet resistance and a source/drain resistance of 16.81 and 11.17 k Omega, respectively, in a consistent manner. We also determined the effective electrical widths, which are different from the physical widths by as much as 40 nm for a 105-nm-wide nanowire, and found a linear dependence of the surface depletion layer's thickness at the side walls on their physical width, which was attributed to structural damage that occurred during the plasma etch process. | - |
| dc.format.extent | 5 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | 한국물리학회 | - |
| dc.title | Electrical Width Determination of Silicon Nanowires Prepared by Using the Top-Down Method | - |
| dc.type | Article | - |
| dc.publisher.location | 대한민국 | - |
| dc.identifier.doi | 10.3938/jkps.55.2486 | - |
| dc.identifier.scopusid | 2-s2.0-76549104068 | - |
| dc.identifier.wosid | 000272877700037 | - |
| dc.identifier.bibliographicCitation | Journal of the Korean Physical Society, v.55, no.6, pp 2486 - 2490 | - |
| dc.citation.title | Journal of the Korean Physical Society | - |
| dc.citation.volume | 55 | - |
| dc.citation.number | 6 | - |
| dc.citation.startPage | 2486 | - |
| dc.citation.endPage | 2490 | - |
| dc.type.docType | Article | - |
| dc.identifier.kciid | ART001494109 | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.description.journalRegisteredClass | kci | - |
| dc.relation.journalResearchArea | Physics | - |
| dc.relation.journalWebOfScienceCategory | Physics, Multidisciplinary | - |
| dc.subject.keywordPlus | TRANSPORT-PROPERTIES | - |
| dc.subject.keywordPlus | FABRICATION | - |
| dc.subject.keywordAuthor | Low-dimensional transport | - |
| dc.subject.keywordAuthor | Semiconductor nanowire | - |
| dc.identifier.url | https://www.jkps.or.kr/journal/view.html?volume=55&number=6&spage=2486&year=2009 | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
222, Wangsimni-ro, Seongdong-gu, Seoul, 04763, Korea+82-2-2220-1366
COPYRIGHT © 2024 HANYANG UNIVERSITY.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.
