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Nanoscale Two-bit NAND Silicon-oxide-nitride-oxide-silicon Flash Memories with a Pair of Double Gate FinFET Structures

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dc.contributor.authorOh, Se Woong-
dc.contributor.authorPark, Sang Su-
dc.contributor.authorYou, Joo Hyung-
dc.contributor.authorKim, Tae Whan-
dc.contributor.authorKim, Hyun Woo-
dc.date.accessioned2022-12-20T21:38:56Z-
dc.date.available2022-12-20T21:38:56Z-
dc.date.created2022-08-26-
dc.date.issued2009-07-
dc.identifier.issn0374-4884-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/176536-
dc.description.abstractNovel NAND silicon-oxide-nitride-oxide-silicon (SONOS) flash memories with a, pair of double gate (DO) FinFET structures were designed to increase storage density. The proposed structures with two DGs were separated along the length of a Fin and shared a source and a drain with another DO. The proposed memory cell was independently operated as two bits due to the Si-Fin channel with two different doping regions. The process and the device characteristics of the NAND SONOS memory cells were simulated by using technology computer-aided design tools. The programming and erasing characteristics of the NAND array were investigated by using the Fowler-Nordheim tunneling processes. Simulation results showed that the NAND SONOS memories acted as a two-bit per cell. The storage capacity of the NAND SONOS memories significantly increased, regardless of the decrease in the cell size.-
dc.language영어-
dc.language.isoen-
dc.publisherKOREAN PHYSICAL SOC-
dc.titleNanoscale Two-bit NAND Silicon-oxide-nitride-oxide-silicon Flash Memories with a Pair of Double Gate FinFET Structures-
dc.typeArticle-
dc.contributor.affiliatedAuthorKim, Tae Whan-
dc.identifier.doi10.3938/jkps.55.263-
dc.identifier.scopusid2-s2.0-69249179521-
dc.identifier.wosid000268023600058-
dc.identifier.bibliographicCitationJOURNAL OF THE KOREAN PHYSICAL SOCIETY, v.55, no.1, pp.263 - 266-
dc.relation.isPartOfJOURNAL OF THE KOREAN PHYSICAL SOCIETY-
dc.citation.titleJOURNAL OF THE KOREAN PHYSICAL SOCIETY-
dc.citation.volume55-
dc.citation.number1-
dc.citation.startPage263-
dc.citation.endPage266-
dc.type.rimsART-
dc.type.docTypeArticle; Proceedings Paper-
dc.identifier.kciidART001498251-
dc.description.journalClass1-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.description.journalRegisteredClasskci-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryPhysics, Multidisciplinary-
dc.subject.keywordPlusSONOS MEMORY-
dc.subject.keywordPlusSIMULATION-
dc.subject.keywordPlusMETAL-
dc.subject.keywordAuthorFinFET-
dc.subject.keywordAuthorDouble-gate FinFET-
dc.subject.keywordAuthorSONOS-
dc.subject.keywordAuthorNAND Flash memory-
dc.subject.keywordAuthor2-bit/cell-
dc.subject.keywordAuthorCharge density-
dc.identifier.urlhttps://www.jkps.or.kr/journal/view.html?volume=55&number=1&spage=263&year=2009-
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