Detailed Information

Cited 0 time in webofscience Cited 0 time in scopus
Metadata Downloads

Simulation of Nanoscale Two-Bit Not-And-type Silicon-Oxide-Nitride-Oxide-Silicon Nonvolatile Memory Devices with a Separated Double-Gate Fin Field Effect Transistor Structure Containing Different Tunneling Oxide Thicknesses

Full metadata record
DC Field Value Language
dc.contributor.authorOh, Se Woong-
dc.contributor.authorPark, Sang Su-
dc.contributor.authorKim, Dong Hun-
dc.contributor.authorKim, Hyun Woo-
dc.contributor.authorKim, Tate Whan-
dc.date.accessioned2022-12-20T21:56:53Z-
dc.date.available2022-12-20T21:56:53Z-
dc.date.created2022-08-26-
dc.date.issued2009-06-
dc.identifier.issn0021-4922-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/176699-
dc.description.abstractNot-and (NAND)-type silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory (NVM) devices with a separated double-gate (SDG) Fin field effect transistor structure were proposed to reduce the unit cell size of such memory devices and increase their memory density in comparison with that of conventional NVM devices. The proposed memory device consisted of a pair of control gates separated along the length of the Fin channel direction. Each SDG had a different thickness of the tunneling oxide to operate the proposed memory device as a two-bit/cell device. A technology computer-aided design simulation was performed to investigate the program/erase and two-bit characteristics. The simulation results show that the proposed devices can be used to increase the scaling down capability and charge storage density of NAND-type SONOS NVM devices.-
dc.language영어-
dc.language.isoen-
dc.publisherIOP Publishing Ltd-
dc.titleSimulation of Nanoscale Two-Bit Not-And-type Silicon-Oxide-Nitride-Oxide-Silicon Nonvolatile Memory Devices with a Separated Double-Gate Fin Field Effect Transistor Structure Containing Different Tunneling Oxide Thicknesses-
dc.typeArticle-
dc.contributor.affiliatedAuthorKim, Tate Whan-
dc.identifier.doi10.1143/JJAP.48.06FD12-
dc.identifier.scopusid2-s2.0-70249085931-
dc.identifier.wosid000267674600036-
dc.identifier.bibliographicCitationJAPANESE JOURNAL OF APPLIED PHYSICS, v.48, no.6, pp.1 - 4-
dc.relation.isPartOfJAPANESE JOURNAL OF APPLIED PHYSICS-
dc.citation.titleJAPANESE JOURNAL OF APPLIED PHYSICS-
dc.citation.volume48-
dc.citation.number6-
dc.citation.startPage1-
dc.citation.endPage4-
dc.type.rimsART-
dc.type.docTypeArticle; Proceedings Paper-
dc.description.journalClass1-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.subject.keywordPlusNAND FLASH MEMORY-
dc.subject.keywordPlusSONOS MEMORY-
dc.subject.keywordPlusCELL-
dc.subject.keywordPlusARCHITECTURE-
dc.identifier.urlhttps://iopscience.iop.org/article/10.1143/JJAP.48.06FD12-
Files in This Item
Go to Link
Appears in
Collections
서울 공과대학 > 서울 융합전자공학부 > 1. Journal Articles

qrcode

Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.

Altmetrics

Total Views & Downloads

BROWSE