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Fast View Synthesis using GPU for 3D Display

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dc.contributor.authorShin, Hong-Chang-
dc.contributor.authorKim, Yong-Jin-
dc.contributor.authorPark, Hanhoon-
dc.contributor.authorPark, Jong-Il-
dc.date.accessioned2022-12-21T00:33:29Z-
dc.date.available2022-12-21T00:33:29Z-
dc.date.created2022-08-26-
dc.date.issued2008-11-
dc.identifier.issn0098-3063-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/177739-
dc.description.abstractIn this paper, we develop a fast view synthesis method that generates multiple intermediate views in real time for a 3D display system when the camera geometry and the depth map of the reference views are given. The proposed method achieves a faster view synthesis than previous approaches by processing in parallel the entire computations required for the view synthesis in GPU Specifically, we use a specialized GPU architecture to control the GPU device and to optimize the speed effectiveness of the proposed fast view synthesis method. To increase the processing speed, we adapted all the processes for the view synthesis to a single instruction multiple data (SIMD) structure that is a main feature of GPU programming, we maximized the use of the high-speed memories on the GPU device, and we optimized the implementation. As a result, we could synthesize 8 intermediate view images with a size of 1024 by 768 pixels within 0.147 second.-
dc.language영어-
dc.language.isoen-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleFast View Synthesis using GPU for 3D Display-
dc.typeArticle-
dc.contributor.affiliatedAuthorPark, Jong-Il-
dc.identifier.doi10.1109/TCE.2008.4711274-
dc.identifier.scopusid2-s2.0-58149384808-
dc.identifier.wosid000261700400085-
dc.identifier.bibliographicCitationIEEE TRANSACTIONS ON CONSUMER ELECTRONICS, v.54, no.4, pp.2068 - 2076-
dc.relation.isPartOfIEEE TRANSACTIONS ON CONSUMER ELECTRONICS-
dc.citation.titleIEEE TRANSACTIONS ON CONSUMER ELECTRONICS-
dc.citation.volume54-
dc.citation.number4-
dc.citation.startPage2068-
dc.citation.endPage2076-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaTelecommunications-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryTelecommunications-
dc.subject.keywordPlusBackpropagation-
dc.subject.keywordPlusCameras-
dc.subject.keywordPlusData storage equipment-
dc.subject.keywordPlusInterpolation-
dc.subject.keywordPlusPixels-
dc.subject.keywordPlusThree dimensional-
dc.subject.keywordAuthor3D display-
dc.subject.keywordAuthorview synthesis-
dc.subject.keywordAuthorintermediate view-
dc.subject.keywordAuthorGPU processing-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/4711274-
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