Improving the Gate Stability of ZnO Thin-Film Transistors with Aluminum Oxide Dielectric Layers

Abstract

We report on the fabrication of gate-stable ZnO thin-film transistors (TFTs) with aluminum oxide dielectric. When an off-stoichiometric AlOx was deposited at room temperature, the ZnO-TFT revealed unreliable transfer characteristics: a large drain current-gate bias (I-D-V-G) hysteresis and a large amount of threshold voltage (V-T) shift under gate-bias stress. As rapid thermal annealing (RTA) in O-2 ambient was applied onto AlOx at 300 degrees C prior to ZnO channel deposition, the gate-bias reliability of the ZnO device was improved. The RTA might cause our AlOx surface to be more stoichiometric and thus to be resistant against ZnO sputter-induced damage. When the bottom-gate ZnO-TFT was fabricated with a stoichiometric Al2O3 dielectric grown by atomic layer deposition (ALD), our device showed much more stable electrical characteristics than with the sputter-deposited off-stoichiometric AlOx. Last, as an ultimate effort to improve the gate reliability, we fabricated a top-gate ZnO-TFT device adopting the same thick ALD-grown stoichiometric Al2O3 as in the bottom-gate device. Our top-gate device with the Al2O3 dielectric then showed no hysteresis and no V-T shift after several times of gate bias sweep. We conclude that both the high quality dielectric and optimized device structure are necessary to realize electrically stable ZnO-TFTs.