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Design of unique NAND flash memory cells with low program disturbance utilizing novel booster line
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Mun, Kyung Sik | - |
| dc.contributor.author | Kim, Jae-Ho | - |
| dc.contributor.author | Kim, Tae Whan | - |
| dc.contributor.author | Dal Kwack, Kae | - |
| dc.date.accessioned | 2022-12-21T11:09:46Z | - |
| dc.date.available | 2022-12-21T11:09:46Z | - |
| dc.date.issued | 2006-06 | - |
| dc.identifier.issn | 0021-4922 | - |
| dc.identifier.issn | 1347-4065 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/181380 | - |
| dc.description.abstract | Unique NAND flash memory cells with a booster line structure were designed to increase the channel voltage of a program-inhibited cell during program cycles. When a program voltage was applied to the selected word line, booster-line voltage coupled with control gate potential induced a high voltage in a program-inhibited channel. Because the turning on of the unselected cells was initiated by the booster line during programming, an unselected word line was maintained in the floating state without applying a pass voltage. Program disturbance in the NAND flash memory cell was decreased using a booster-line boosting scheme, and the cell's pass disturbance was effectively eliminated. The proposed unique NAND flash memory cell with a booster line can be used to improve the reliability of nanoscale NAND flash memories. | - |
| dc.format.extent | 5 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | IOP Publishing Ltd | - |
| dc.title | Design of unique NAND flash memory cells with low program disturbance utilizing novel booster line | - |
| dc.type | Article | - |
| dc.publisher.location | 영국 | - |
| dc.identifier.doi | 10.1143/JJAP.45.4955 | - |
| dc.identifier.scopusid | 2-s2.0-33745239616 | - |
| dc.identifier.wosid | 000238499700015 | - |
| dc.identifier.bibliographicCitation | Japanese Journal of Applied Physics, v.45, no.6A, pp 4955 - 4959 | - |
| dc.citation.title | Japanese Journal of Applied Physics | - |
| dc.citation.volume | 45 | - |
| dc.citation.number | 6A | - |
| dc.citation.startPage | 4955 | - |
| dc.citation.endPage | 4959 | - |
| dc.type.docType | Article | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Physics | - |
| dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
| dc.subject.keywordPlus | MULTILEVEL | - |
| dc.subject.keywordPlus | 3.3-V | - |
| dc.subject.keywordAuthor | booster line | - |
| dc.subject.keywordAuthor | NAND flash memory | - |
| dc.subject.keywordAuthor | program disturbance | - |
| dc.subject.keywordAuthor | pass disturbance | - |
| dc.subject.keywordAuthor | self-boosting program-inhibiting scheme | - |
| dc.subject.keywordAuthor | program-inhibited cell | - |
| dc.identifier.url | https://iopscience.iop.org/article/10.1143/JJAP.45.4955 | - |
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