Modeling and analysis of lead frame structure in electronic packaging using Java and ANSYS

Abstract

As the larger capacity and smaller packaging size are required in the design of a semiconductor, areas and pitches of solder joints have been miniaturized. Therefore the importance of bondability and reliability in soldering technique for the printed circuit board design has been increased since the fatigue failure has been observed at the place between the lead frame and solder joints. To evaluate thermal reliability of SMD type electronic packaging such as SOIC, PLCC and BGA, an exclusive module for modeling a lead frame structure is developed using JavaSeript and the thermal stress analysis is performed using ANSYS. A modeling program with GUI can define geometric dimensions of an electronic packaging, assign material properties of a lead frame and a solder and apply boundary conditions. A seamless integration between modeling and analysis is achieved by implementing an interface program to generate an analysis model of a lead frame structure directly from the model information. Heat transfer analysis and stress analysis considering thermal loading are carried out in ANSYS and the results are exploited to estimate the fatigue life of a lead frame based on the S-N curve. The effect of different lead frame materials is examined to identify the mechanical characteristics and the different shapes of the lead frame with same SMD type are investigated to distinguish the reliability.