Rapid performance re-engineering of distributed embedded systems via latency analysis and k-level diagonal search
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Park, Jungkeun | - |
dc.contributor.author | Ryu, Minsoo | - |
dc.contributor.author | Hong, Seongsoo | - |
dc.contributor.author | Lo Bello, Lucia | - |
dc.date.accessioned | 2022-12-21T23:57:17Z | - |
dc.date.available | 2022-12-21T23:57:17Z | - |
dc.date.issued | 2006-01 | - |
dc.identifier.issn | 0743-7315 | - |
dc.identifier.issn | 1096-0848 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/181910 | - |
dc.description.abstract | This paper presents a systematic methodology aimed at rapid and cost-effective re-engineering of distributed embedded systems. We define embedded system re-engineering as an analysis and alteration of a legacy system, to guarantee newly imposed performance requirements such as throughput and input-to-output latency. Our methodology pinpoints performance bottlenecks of a system and selectively upgrades processing elements at the least cost. Inputs for our methodology include a system design specified by a process network over a set of processing elements and a new throughput requirement. The output is a set of scaling factors that represent the ratios of the performance upgrades for processing elements. Our methodology works in two steps. First, it estimates the latency of each process and identifies bottleneck processes. Second, it derives a system of constraints with scaling factors being free variables and formulates an optimization problem. Then, it solves the optimization problem for scaling factors with an objective of minimizing upgrade cost. For this methodology, we propose an accurate latency analysis technique for precedence-constrained tasks under preemptive fixed priority scheduling. We also propose a k-level diagonal search algorithm that allows us to trade optimality for search time. Our experimental results show the effectiveness of the proposed re-engineering approach. | - |
dc.format.extent | 13 | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | ACADEMIC PRESS INC ELSEVIER SCIENCE | - |
dc.title | Rapid performance re-engineering of distributed embedded systems via latency analysis and k-level diagonal search | - |
dc.type | Article | - |
dc.publisher.location | 미국 | - |
dc.identifier.doi | 10.1016/j.jpdc.2005.06.004 | - |
dc.identifier.scopusid | 2-s2.0-29244466446 | - |
dc.identifier.wosid | 000234656800002 | - |
dc.identifier.bibliographicCitation | JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING, v.66, no.1, pp 19 - 31 | - |
dc.citation.title | JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING | - |
dc.citation.volume | 66 | - |
dc.citation.number | 1 | - |
dc.citation.startPage | 19 | - |
dc.citation.endPage | 31 | - |
dc.type.docType | Article | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Theory & Methods | - |
dc.subject.keywordPlus | DESIGN | - |
dc.subject.keywordAuthor | distributed embedded systems | - |
dc.subject.keywordAuthor | re-engineering | - |
dc.subject.keywordAuthor | latency analysis | - |
dc.subject.keywordAuthor | performance/cost optimization | - |
dc.identifier.url | https://www.sciencedirect.com/science/article/pii/S0743731505001565?via%3Dihub | - |
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