Investigation of Tunneling Current in SiO2/HfO2 Gate Stacks for Flash Memory Applications
DC Field | Value | Language |
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dc.contributor.author | Chakrabarti, Bhaswar | - |
dc.contributor.author | Kang, Heesoo | - |
dc.contributor.author | Brennan, Barry | - |
dc.contributor.author | Park, Tae Joo | - |
dc.contributor.author | Cantley, Kurtis D. | - |
dc.contributor.author | Pirkle, Adam | - |
dc.contributor.author | McDonnell, Stephen | - |
dc.contributor.author | Kim, Jiyoung | - |
dc.contributor.author | Wallace, Robert M. | - |
dc.contributor.author | Vogel, Eric M. | - |
dc.date.accessioned | 2022-12-22T01:39:42Z | - |
dc.date.available | 2022-12-22T01:39:42Z | - |
dc.date.created | 2021-01-21 | - |
dc.date.issued | 2011-12 | - |
dc.identifier.issn | 0018-9383 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/181992 | - |
dc.description.abstract | Despite theoretical predictions of significant performance improvement in Flash memory devices using tunnel-barrier-engineered (TBE) structures, there have been very few reports that demonstrate experimental verification. In this work, we have studied the role of factors such as high-k layer thickness and annealing recipe on the performance of SiO2/HfO2 gate stacks by electrical and physical characterization techniques. Results indicate that thick HfO2 is not suitable for use in SiO2/HfO2 stacks for tunnel barrier engineering applications. The performance of SiO2/HfO2 stacks improves with decreasing thickness of the HfO2 layer. Mild (10%) O-2/N-2 anneals do not significantly affect performance, although annealing above 600 degrees C resulted in a slight decrease in the program current. Based on our observations, we propose a method to improve the program current in these structures and a simple hypothesis for the physical model for tunneling in SiO2/HfO2 stacks. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Investigation of Tunneling Current in SiO2/HfO2 Gate Stacks for Flash Memory Applications | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Park, Tae Joo | - |
dc.identifier.doi | 10.1109/TED.2011.2170198 | - |
dc.identifier.scopusid | 2-s2.0-82155168203 | - |
dc.identifier.wosid | 000297337000008 | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON ELECTRON DEVICES, v.58, no.12, pp.4189 - 4195 | - |
dc.relation.isPartOf | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.citation.title | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.citation.volume | 58 | - |
dc.citation.number | 12 | - |
dc.citation.startPage | 4189 | - |
dc.citation.endPage | 4195 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | HAFNIUM OXIDE | - |
dc.subject.keywordPlus | REDUCTION | - |
dc.subject.keywordPlus | BARRIERS | - |
dc.subject.keywordPlus | TRAPS | - |
dc.subject.keywordAuthor | Charge traps | - |
dc.subject.keywordAuthor | Fowler-Nordheim (F-N) tunneling | - |
dc.subject.keywordAuthor | high-k dielectric | - |
dc.subject.keywordAuthor | tunnel barrier engineering | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/6062399 | - |
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