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A Data Layout with Good Data Locality for Single-Machine based Graph Engines

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dc.contributor.authorJo, Yong-Yeon-
dc.contributor.authorJang, Myung-Hwan-
dc.contributor.authorKim, Sang-Wook-
dc.contributor.authorPark, Sunju-
dc.date.accessioned2023-05-03T14:27:45Z-
dc.date.available2023-05-03T14:27:45Z-
dc.date.created2021-11-22-
dc.date.issued2021-08-
dc.identifier.issn0018-9340-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/185440-
dc.description.abstractGraph engines have been used in many applications to handle big graphs efficiently. The majority of the research to improve their performance has focused primarily on the design of efficient graph processing. This paper claims,however,the focus should be given also to graph storage design. This is because good storage design can improve both CPU performance and I/O performance of graph engines. In this paper,we propose an efficient data layout for single-machine based graph engines. We identify the common node access pattern of the graph algorithms running on single-machine based graph engines. Based on this finding,we propose the breadth-first (BF) data layout which places the nodes processed together in the same or adjacent storage space so that they can be accessed together as much as possible. The experimental results show that the BF data layout improves both CPU and I/O performances significantly in all single-machine based graph engines.-
dc.language영어-
dc.language.isoen-
dc.publisherIEEE COMPUTER SOC-
dc.titleA Data Layout with Good Data Locality for Single-Machine based Graph Engines-
dc.typeArticle-
dc.contributor.affiliatedAuthorKim, Sang-Wook-
dc.identifier.doi10.1109/TC.2021.3107725-
dc.identifier.scopusid2-s2.0-85113852016-
dc.identifier.wosid000822371600001-
dc.identifier.bibliographicCitationIEEE TRANSACTIONS ON COMPUTERS, v.71, no.8, pp.1784 - 1793-
dc.relation.isPartOfIEEE TRANSACTIONS ON COMPUTERS-
dc.citation.titleIEEE TRANSACTIONS ON COMPUTERS-
dc.citation.volume71-
dc.citation.number8-
dc.citation.startPage1784-
dc.citation.endPage1793-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryComputer Science, Hardware & Architecture-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.subject.keywordPlusDigital storage-
dc.subject.keywordPlusEngines-
dc.subject.keywordPlusAccess patterns-
dc.subject.keywordPlusBreadth-first-
dc.subject.keywordPlusData layouts-
dc.subject.keywordPlusGood data-
dc.subject.keywordPlusGraph processing-
dc.subject.keywordPlusSingle- machines-
dc.subject.keywordPlusStorage spaces-
dc.subject.keywordPlusGraph algorithms-
dc.subject.keywordAuthorData layout-
dc.subject.keywordAuthordata locality-
dc.subject.keywordAuthorgraph engine-
dc.subject.keywordAuthorsingle machine-
dc.subject.keywordAuthorbreadth first search-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/9522039-
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