Mismatch-Shaping Switching Scheme for Split-Array Capacitive DACsopen access
- Authors
- Nam, Jae-Hyeon; Park, Sung-Hyun; Jang, Jin-Yeop; Park, Sang-Gyu
- Issue Date
- Apr-2023
- Publisher
- MDPI
- Keywords
- capacitive DAC; switching energy; nonlinear distortion; oversampling; mismatch shaping; element rotation
- Citation
- ELECTRONICS, v.12, no.8, pp.1 - 12
- Indexed
- SCIE
SCOPUS
- Journal Title
- ELECTRONICS
- Volume
- 12
- Number
- 8
- Start Page
- 1
- End Page
- 12
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/185869
- DOI
- 10.3390/electronics12081891
- Abstract
- Capacitive DACs (C-DACs) are widely used as stand-alone DACs or in an ADC as auxiliary DACs. An important performance metric of a C-DAC is its energy consumption and the linearity between the digital input and the analog output. In multi-bit C-DACs, the mismatch between the capacitors can degrade linearity, which can be important in high-resolution applications. In this work, we analyze the power consumption and linearity performance of a class of C-DACs called split-array C-DACs. We show that the simple element rotation technique, which is widely used to suppress the mismatch error of DACs, cannot be used with the power-efficient three-level switching scheme to effectively suppress the mismatch error. Then, we propose a switching scheme which can be used with the power efficient three-level switching and can suppress the in-band mismatch error effectively.
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