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Anti-forensic deletion scheme for flash storage systems

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dc.contributor.authorKwak, Jaewook-
dc.contributor.authorKim, Hyung Chan-
dc.contributor.authorPark, Il Hwan-
dc.contributor.authorSong, Yong Ho-
dc.date.accessioned2021-08-02T14:53:42Z-
dc.date.available2021-08-02T14:53:42Z-
dc.date.created2021-05-11-
dc.date.issued2017-07-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/19586-
dc.description.abstractUnlike hard disk drive (HDD)-based storage systems, NAND flash memory-based storage systems require an additional layer called the flash translation layer (FTL) between the file system and storage devices. The FTL helps file systems use NAND flash memory in the same way as HDD by using the address mapping function. However, this function can produce a side effect of delaying the physical erasure point of data when deleting data. In this paper, we analyze the time delay phenomenon of data erasure from the flash storage device that uses the FTL and propose the anti-forensic deletion scheme, which can minimize the delay time. The experimental results confirm that the proposed deletion scheme is effective in reducing the delay time of data erasing. ? 2016 IEEE.-
dc.language영어-
dc.language.isoen-
dc.publisherInstitute of Electrical and Electronics Engineers Inc.-
dc.titleAnti-forensic deletion scheme for flash storage systems-
dc.typeArticle-
dc.contributor.affiliatedAuthorSong, Yong Ho-
dc.identifier.doi10.1109/ICNIDC.2016.7974588-
dc.identifier.scopusid2-s2.0-85027506785-
dc.identifier.bibliographicCitationProceedings of 2016 5th International Conference on Network Infrastructure and Digital Content, IEEE IC-NIDC 2016, pp.317 - 321-
dc.relation.isPartOfProceedings of 2016 5th International Conference on Network Infrastructure and Digital Content, IEEE IC-NIDC 2016-
dc.citation.titleProceedings of 2016 5th International Conference on Network Infrastructure and Digital Content, IEEE IC-NIDC 2016-
dc.citation.startPage317-
dc.citation.endPage321-
dc.type.rimsART-
dc.type.docTypeConference Paper-
dc.description.journalClass1-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscopus-
dc.subject.keywordPlusDigital integrated circuits-
dc.subject.keywordPlusDigital storage-
dc.subject.keywordPlusFile organization-
dc.subject.keywordPlusFlash memory-
dc.subject.keywordPlusMemory architecture-
dc.subject.keywordPlusNAND circuits-
dc.subject.keywordPlusTime delay-
dc.subject.keywordPlusVirtual storage-
dc.subject.keywordPlusAddress mappings-
dc.subject.keywordPlusAnti-Forensics-
dc.subject.keywordPlusData erasure-
dc.subject.keywordPlusFlash translation layer-
dc.subject.keywordPlusGarbage collection-
dc.subject.keywordPlusHard disk drives-
dc.subject.keywordPlusNAND flash memory-
dc.subject.keywordPlusTRIM-
dc.subject.keywordPlusHard disk storage-
dc.subject.keywordAuthorAnti-forensic-
dc.subject.keywordAuthorData erasure-
dc.subject.keywordAuthorFlash memory-
dc.subject.keywordAuthorGarbage collection-
dc.subject.keywordAuthorTRIM-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/7974588-
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