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Two-stage analysis of large-scale protocol information in mobile storage systems

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dc.contributor.authorJeong, J.-
dc.contributor.authorSong, Y.H.-
dc.date.accessioned2021-08-02T14:53:44Z-
dc.date.available2021-08-02T14:53:44Z-
dc.date.created2021-05-11-
dc.date.issued2017-07-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/19588-
dc.description.abstractMany recent mobile devices use flash memory as a storage media. A flash-based storage interacts with its host system using a pre-defined interface protocol. Therefore, in order to verify the operation correctness of storage devices and to evaluate the performance of them, it is important to analyze the interaction between a host and its storage device at the interface protocol level. However, due to the emergence of applications with intensive storage accesses and the support by operating systems for multicore systems running multiple concurrent applications, it becomes make the analysis more complicated. In this paper, we propose a two-stage analysis method for large-scale protocol information and also introduce an efficient data organization to help easy and random access to protocol information. The proposed method has been implemented in a protocol analysis system for mobile storage.-
dc.language영어-
dc.language.isoen-
dc.publisherInstitute of Electrical and Electronics Engineers Inc.-
dc.titleTwo-stage analysis of large-scale protocol information in mobile storage systems-
dc.typeArticle-
dc.contributor.affiliatedAuthorSong, Y.H.-
dc.identifier.doi10.1109/ICNIDC.2016.7974569-
dc.identifier.scopusid2-s2.0-85027491717-
dc.identifier.bibliographicCitationProceedings of 2016 5th International Conference on Network Infrastructure and Digital Content, IEEE IC-NIDC 2016, pp.224 - 228-
dc.relation.isPartOfProceedings of 2016 5th International Conference on Network Infrastructure and Digital Content, IEEE IC-NIDC 2016-
dc.citation.titleProceedings of 2016 5th International Conference on Network Infrastructure and Digital Content, IEEE IC-NIDC 2016-
dc.citation.startPage224-
dc.citation.endPage228-
dc.type.rimsART-
dc.type.docTypeConference Paper-
dc.description.journalClass1-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscopus-
dc.subject.keywordPlusDigital integrated circuits-
dc.subject.keywordPlusDistributed computer systems-
dc.subject.keywordPlusFlash memory-
dc.subject.keywordPlusIndexing (of information)-
dc.subject.keywordPlusVirtual storage-
dc.subject.keywordPlusBit lines-
dc.subject.keywordPlusInterface protocol-
dc.subject.keywordPlusLarge scale data-
dc.subject.keywordPlusMobile storage system-
dc.subject.keywordPlusMulti-core systems-
dc.subject.keywordPlusProtocol analysis-
dc.subject.keywordPlusProtocol information-
dc.subject.keywordPlusTwo-stage analysis-
dc.subject.keywordPlusDigital storage-
dc.subject.keywordAuthorBit-line signal analysis-
dc.subject.keywordAuthorIndexing-
dc.subject.keywordAuthorLarge-scale data-
dc.subject.keywordAuthorProtocol analysis-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/7974569-
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