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Simple SLL Reduction Method for an SIW Longitudinal Slot Array Antenna
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Seo, Deokjin | - |
| dc.contributor.author | Choi, Junmo | - |
| dc.contributor.author | Ryu, Jongin | - |
| dc.contributor.author | Jung, Kyung-Young | - |
| dc.date.accessioned | 2024-11-28T18:31:25Z | - |
| dc.date.available | 2024-11-28T18:31:25Z | - |
| dc.date.issued | 2024-10 | - |
| dc.identifier.issn | 2169-3536 | - |
| dc.identifier.issn | 2169-3536 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/197958 | - |
| dc.description.abstract | The deployment of Ka-band radar necessitates addressing increased losses due to rain and free-space propagation, in addition to achieving low sidelobe levels (SLL). Substrate integrated waveguide (SIW) slot antennas, with their high-power handling capability and low loss, present a practical solution for Ka-band radar applications. However, previous SLL reduction methods for SIW longitudinal slot array antennas involves high design complexity or degrade the antenna's radiation efficiency. In this work, we introduce a novel SLL reduction method for an SIW longitudinal slot array antenna using only one design variable-slot offset-to map electric field amplitude to a reference distribution. Our method effectively reduces SLL while maintaining radiation efficiency. The proposed antenna was fabricated and measured, showing good agreement with simulations. Compared to previous methods, our approach is simpler, advancing SIW slot array antenna design and SLL reduction. | - |
| dc.format.extent | 7 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
| dc.title | Simple SLL Reduction Method for an SIW Longitudinal Slot Array Antenna | - |
| dc.type | Article | - |
| dc.publisher.location | 미국 | - |
| dc.identifier.doi | 10.1109/ACCESS.2024.3473910 | - |
| dc.identifier.scopusid | 2-s2.0-85207152348 | - |
| dc.identifier.wosid | 001337879200001 | - |
| dc.identifier.bibliographicCitation | IEEE Access, v.12, pp 146359 - 146365 | - |
| dc.citation.title | IEEE Access | - |
| dc.citation.volume | 12 | - |
| dc.citation.startPage | 146359 | - |
| dc.citation.endPage | 146365 | - |
| dc.type.docType | Article | - |
| dc.description.isOpenAccess | Y | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Computer Science | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalResearchArea | Telecommunications | - |
| dc.relation.journalWebOfScienceCategory | Computer Science, Information Systems | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.relation.journalWebOfScienceCategory | Telecommunications | - |
| dc.subject.keywordPlus | DESIGN | - |
| dc.subject.keywordPlus | BAND | - |
| dc.subject.keywordAuthor | Antenna arrays | - |
| dc.subject.keywordAuthor | Slot antennas | - |
| dc.subject.keywordAuthor | Radar antennas | - |
| dc.subject.keywordAuthor | Optimization | - |
| dc.subject.keywordAuthor | Antennas | - |
| dc.subject.keywordAuthor | Substrates | - |
| dc.subject.keywordAuthor | Radar applications | - |
| dc.subject.keywordAuthor | Power transmission lines | - |
| dc.subject.keywordAuthor | Resonant frequency | - |
| dc.subject.keywordAuthor | Reflector antennas | - |
| dc.subject.keywordAuthor | SIW | - |
| dc.subject.keywordAuthor | low side-lobe level | - |
| dc.subject.keywordAuthor | SLL reduction method | - |
| dc.identifier.url | https://ieeexplore.ieee.org/document/10705285 | - |
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