Way-lookup buffer for low-power set-associative cache

Abstract

The way-predicting (WP) cache is simple and energy-efficient when used as L1 cache. However, a concern in the WP cache is the speed of the slow hit. This paper proposes the use of way-lookup buffer (WLB) cache to alleviate the problem of slow hit in the WP cache. The results show that the WLB slow hit is 33% faster than the WP slow hit in L1 cache. This is important because the slow hit is often the critical path that determines the processor clock cycle time. The WLB cache is as energy-efficient as the WP cache when used as L1 cache; using the WLB cache can reduce the power consumed by the conventional L1 cache by 68%. Therefore, if we like the nice properties (i.e., simplicity and energy efficiency) of the WP cache but are reluctant to use it because the slow hit extends the processor clock cycle time, then the WLB cache is the one to use.