Achievement of Gradual Conductance Characteristics Based on Interfacial Phase-Change Memory for Artificial Synapse Applications
DC Field | Value | Language |
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dc.contributor.author | Kang, Shinyoung | - |
dc.contributor.author | Lee, Juyoung | - |
dc.contributor.author | Kang, Myounggon | - |
dc.contributor.author | Song, Yun Heub | - |
dc.date.accessioned | 2021-07-30T04:54:39Z | - |
dc.date.available | 2021-07-30T04:54:39Z | - |
dc.date.created | 2021-05-11 | - |
dc.date.issued | 2020-08 | - |
dc.identifier.issn | 2079-9292 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/2033 | - |
dc.description.abstract | In this paper, gradual and symmetrical long-term potentiation (LTP) and long-term depression (LTD) were achieved by applying the optimal electrical pulse condition of the interfacial phase-change memory (iPCM) based on a superlattice (SL) structure fabricated by stacking GeTe/Sb(2)Te(3)alternately to implement an artificial synapse in neuromorphic computing. Furthermore, conventional phase-change random access memory (PCRAM) based on a Ge-Sb-Te (GST) alloy with an identical bottom electrode contact size was fabricated to compare the electrical characteristics. The results showed a reduction in the reset energy consumption of the GeTe/Sb2Te3(GT/ST) iPCM by more than 69% of the GST alloy for each bottom electrode contact size. Additionally, the GT/ST iPCM achieved gradual conductance tuning and 90.6% symmetry between LTP and LTD with a relatively unsophisticated pulse scheme. Based on the above results, GT/ST iPCM is anticipated to be exploitable as a synaptic device used for brain-inspired computing and to be utilized for next-generation non-volatile memory. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | MDPI | - |
dc.title | Achievement of Gradual Conductance Characteristics Based on Interfacial Phase-Change Memory for Artificial Synapse Applications | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Song, Yun Heub | - |
dc.identifier.doi | 10.3390/electronics9081268 | - |
dc.identifier.scopusid | 2-s2.0-85090671428 | - |
dc.identifier.wosid | 000564755700001 | - |
dc.identifier.bibliographicCitation | ELECTRONICS, v.9, no.8, pp.1 - 8 | - |
dc.relation.isPartOf | ELECTRONICS | - |
dc.citation.title | ELECTRONICS | - |
dc.citation.volume | 9 | - |
dc.citation.number | 8 | - |
dc.citation.startPage | 1 | - |
dc.citation.endPage | 8 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | Y | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Information Systems | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordAuthor | interfacial phase-change memory | - |
dc.subject.keywordAuthor | phase-change memory | - |
dc.subject.keywordAuthor | artificial synaptic device | - |
dc.subject.keywordAuthor | superlattice | - |
dc.subject.keywordAuthor | neuromorphic devices | - |
dc.identifier.url | https://www.mdpi.com/2079-9292/9/8/1268 | - |
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