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Achievement of Gradual Conductance Characteristics Based on Interfacial Phase-Change Memory for Artificial Synapse Applications

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dc.contributor.authorKang, Shinyoung-
dc.contributor.authorLee, Juyoung-
dc.contributor.authorKang, Myounggon-
dc.contributor.authorSong, Yun Heub-
dc.date.accessioned2021-07-30T04:54:39Z-
dc.date.available2021-07-30T04:54:39Z-
dc.date.created2021-05-11-
dc.date.issued2020-08-
dc.identifier.issn2079-9292-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/2033-
dc.description.abstractIn this paper, gradual and symmetrical long-term potentiation (LTP) and long-term depression (LTD) were achieved by applying the optimal electrical pulse condition of the interfacial phase-change memory (iPCM) based on a superlattice (SL) structure fabricated by stacking GeTe/Sb(2)Te(3)alternately to implement an artificial synapse in neuromorphic computing. Furthermore, conventional phase-change random access memory (PCRAM) based on a Ge-Sb-Te (GST) alloy with an identical bottom electrode contact size was fabricated to compare the electrical characteristics. The results showed a reduction in the reset energy consumption of the GeTe/Sb2Te3(GT/ST) iPCM by more than 69% of the GST alloy for each bottom electrode contact size. Additionally, the GT/ST iPCM achieved gradual conductance tuning and 90.6% symmetry between LTP and LTD with a relatively unsophisticated pulse scheme. Based on the above results, GT/ST iPCM is anticipated to be exploitable as a synaptic device used for brain-inspired computing and to be utilized for next-generation non-volatile memory.-
dc.language영어-
dc.language.isoen-
dc.publisherMDPI-
dc.titleAchievement of Gradual Conductance Characteristics Based on Interfacial Phase-Change Memory for Artificial Synapse Applications-
dc.typeArticle-
dc.contributor.affiliatedAuthorSong, Yun Heub-
dc.identifier.doi10.3390/electronics9081268-
dc.identifier.scopusid2-s2.0-85090671428-
dc.identifier.wosid000564755700001-
dc.identifier.bibliographicCitationELECTRONICS, v.9, no.8, pp.1 - 8-
dc.relation.isPartOfELECTRONICS-
dc.citation.titleELECTRONICS-
dc.citation.volume9-
dc.citation.number8-
dc.citation.startPage1-
dc.citation.endPage8-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.isOpenAccessY-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryComputer Science, Information Systems-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.subject.keywordAuthorinterfacial phase-change memory-
dc.subject.keywordAuthorphase-change memory-
dc.subject.keywordAuthorartificial synaptic device-
dc.subject.keywordAuthorsuperlattice-
dc.subject.keywordAuthorneuromorphic devices-
dc.identifier.urlhttps://www.mdpi.com/2079-9292/9/8/1268-
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