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Determining golden process routes in semiconductor manufacturing process for yield management
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lee, Chang-H | - |
| dc.contributor.author | Lee, Dong Hee | - |
| dc.contributor.author | Bae, Young-Mok | - |
| dc.contributor.author | Kim,Kwang-Ja | - |
| dc.date.accessioned | 2024-12-20T07:40:03Z | - |
| dc.date.available | 2024-12-20T07:40:03Z | - |
| dc.date.issued | 2018-02 | - |
| dc.identifier.issn | 2157-3611 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/203578 | - |
| dc.description.abstract | Managing the yield of wafer is one of the most important tasks to the semiconductor manufacturers. A lot of efforts for enhancing the yield of wafer have been conducted in both industries and academia. Thanks to the advance of IoT and data analytics techniques, huge amount of process operational data, such as indices of process parameters, equipment condition data, or historical data of manufacturing process, is collected and analyzed in real-time. Though the amount and availability of process operational data have been increased, existing yield management approaches on semiconductor manufacturing process have only considered a single process or few processes among the overall processes. This study proposes a way to find process routes which maximize the yield of wafer (i.e., golden process routes) in view of multiple process steps. This work is expected to complement the existing efforts for managing the yield of wafer by adding results of process-oriented analysis. | - |
| dc.format.extent | 5 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.title | Determining golden process routes in semiconductor manufacturing process for yield management | - |
| dc.type | Article | - |
| dc.publisher.location | 미국 | - |
| dc.identifier.doi | 10.1109/IEEM.2017.8290315 | - |
| dc.identifier.scopusid | 2-s2.0-85045248883 | - |
| dc.identifier.bibliographicCitation | IEEE International Conference on Industrial Engineering and Engineering Management, v.2017-December, pp 2366 - 2370 | - |
| dc.citation.title | IEEE International Conference on Industrial Engineering and Engineering Management | - |
| dc.citation.volume | 2017-December | - |
| dc.citation.startPage | 2366 | - |
| dc.citation.endPage | 2370 | - |
| dc.type.docType | Conference Paper | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.subject.keywordPlus | Semiconductor device manufacture | - |
| dc.subject.keywordPlus | Amount and availability | - |
| dc.subject.keywordPlus | Equipment conditions | - |
| dc.subject.keywordPlus | Manufacturing process | - |
| dc.subject.keywordPlus | Process parameters | - |
| dc.subject.keywordPlus | Process route | - |
| dc.subject.keywordPlus | Semiconductor manufacturers | - |
| dc.subject.keywordPlus | Semiconductor manufacturing process | - |
| dc.subject.keywordPlus | Yield management | - |
| dc.subject.keywordPlus | Silicon wafers | - |
| dc.subject.keywordAuthor | Golden process route | - |
| dc.subject.keywordAuthor | Semiconductor manufacturing process | - |
| dc.subject.keywordAuthor | Yield management | - |
| dc.identifier.url | https://ieeexplore.ieee.org/document/8290315 | - |
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