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Advancing device-based computing by simplifying circuit complexity
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Park, Taehyun | - |
| dc.contributor.author | Kim, Minseo | - |
| dc.contributor.author | Seo, Juhyung | - |
| dc.contributor.author | Kim, Young-Joon | - |
| dc.contributor.author | Trivedi, Amit Ranjan | - |
| dc.contributor.author | Han, Joon-Kyu | - |
| dc.contributor.author | Yoo, Hocheon | - |
| dc.date.accessioned | 2025-05-09T02:30:14Z | - |
| dc.date.available | 2025-05-09T02:30:14Z | - |
| dc.date.issued | 2025-04 | - |
| dc.identifier.issn | 2666-9986 | - |
| dc.identifier.issn | 2666-9986 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/207336 | - |
| dc.description.abstract | With Moore's law approaching its scaling limits, the quest for higher integration density in computing devices has become increasingly challenging. Device-based computer architecture can achieve circuit compaction by creating devices with a simpler circuit tailored for specific purposes. However, paradoxically, many of these devices require a greater number of transistors or other electronic components than conventional von Neumann systems. This review highlights recent advances in device-based computing. We seek to demonstrate how device-based computing can be used to implement von Neumann architectures more efficiently through Boolean logic and also to realize next-generation non-von Neumann systems, with a focus on improving integration density and energy efficiency. | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | Cell Press | - |
| dc.title | Advancing device-based computing by simplifying circuit complexity | - |
| dc.type | Article | - |
| dc.publisher.location | 미국 | - |
| dc.identifier.doi | 10.1016/j.device.2025.100720 | - |
| dc.identifier.scopusid | 2-s2.0-105002573832 | - |
| dc.identifier.wosid | 001476318600001 | - |
| dc.identifier.bibliographicCitation | Device, v.3, no.4 | - |
| dc.citation.title | Device | - |
| dc.citation.volume | 3 | - |
| dc.citation.number | 4 | - |
| dc.type.docType | Review | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.description.journalRegisteredClass | esci | - |
| dc.relation.journalResearchArea | Materials Science | - |
| dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
| dc.subject.keywordPlus | BAYESIAN NEURAL-NETWORKS | - |
| dc.subject.keywordPlus | MOORES LAW | - |
| dc.subject.keywordPlus | MODELS | - |
| dc.subject.keywordPlus | LOGIC | - |
| dc.subject.keywordAuthor | circuit compaction | - |
| dc.subject.keywordAuthor | device-based computing | - |
| dc.subject.keywordAuthor | DTI-2: Explore | - |
| dc.subject.keywordAuthor | neuromorphic computing | - |
| dc.subject.keywordAuthor | stochastic computing | - |
| dc.subject.keywordAuthor | transistor counts | - |
| dc.identifier.url | https://www.sciencedirect.com/science/article/abs/pii/S266699862500033X?via%3Dihub | - |
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