Cited 0 time in
ARNorm: Hardware-Efficient Normalization for Lightweight Edge Models
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kim, Sunyeop | - |
| dc.contributor.author | Rhee, Chae-eun | - |
| dc.date.accessioned | 2025-10-20T01:30:36Z | - |
| dc.date.available | 2025-10-20T01:30:36Z | - |
| dc.date.issued | 2025-09 | - |
| dc.identifier.issn | 2997-7401 | - |
| dc.identifier.issn | 2997-741X | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/208916 | - |
| dc.description.abstract | We propose ARNorm, a hardware-friendly normalization algorithm designed for efficient inference in transformer-based models. ARNorm combines the structural simplicity of RMSNorm [1] with the hardware-optimized techniques of AILayerNorm, introduced in SOLE [2] achieving accurate normalization using only 8-bit integer precision (INT8) arithmetic. By employing dynamic compression and a priority encoder-based Look-Up Table (LUT) for root approximation, ARNorm eliminates costly floating-point operations such as mean, variance, and square root calculations. Experiments on six pre-trained Vision Transformer models demonstrate that ARNorm reduces quantization error by up to 10% compared to AILayerNorm and maintains accuracy comparable to 32-bit floating point precision(FP32)-based RMSNorm, making it highly suitable for edge and embedded AI applications. | - |
| dc.format.extent | 3 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
| dc.title | ARNorm: Hardware-Efficient Normalization for Lightweight Edge Models | - |
| dc.type | Article | - |
| dc.identifier.doi | 10.1109/ITC-CSCC66376.2025.11137703 | - |
| dc.identifier.scopusid | 2-s2.0-105016373794 | - |
| dc.identifier.bibliographicCitation | 2025 International Technical Conference on Circuits/Systems, Computers, and Communications, ITC-CSCC 2025, pp 1 - 3 | - |
| dc.citation.title | 2025 International Technical Conference on Circuits/Systems, Computers, and Communications, ITC-CSCC 2025 | - |
| dc.citation.startPage | 1 | - |
| dc.citation.endPage | 3 | - |
| dc.type.docType | Conference paper | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.subject.keywordPlus | Computation theory | - |
| dc.subject.keywordPlus | Computer hardware | - |
| dc.subject.keywordPlus | Computer vision | - |
| dc.subject.keywordPlus | Image coding | - |
| dc.subject.keywordPlus | Inference engines | - |
| dc.subject.keywordPlus | Numerical analysis | - |
| dc.subject.keywordPlus | Table lookup | - |
| dc.subject.keywordAuthor | AILayerNorm | - |
| dc.subject.keywordAuthor | Hardware Accelerator | - |
| dc.subject.keywordAuthor | INT8 | - |
| dc.subject.keywordAuthor | Layer Normalization | - |
| dc.subject.keywordAuthor | Quantization | - |
| dc.subject.keywordAuthor | RMSNorm | - |
| dc.subject.keywordAuthor | Transformer | - |
| dc.subject.keywordAuthor | Vision Trans-former | - |
| dc.identifier.url | https://ieeexplore.ieee.org/document/11137703 | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
222, Wangsimni-ro, Seongdong-gu, Seoul, 04763, Korea+82-2-2220-1366
COPYRIGHT © 2024 HANYANG UNIVERSITY.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.
