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Bastag: Byte-level Access Control on Shared Memory using ARM Memory Tagging Extension

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dc.contributor.authorYou, Junseung-
dc.contributor.authorSeo, Jiwon-
dc.contributor.authorLee, Kyeongryong-
dc.contributor.authorCho, Yeongpil-
dc.contributor.authorPaek, Yunheung-
dc.date.accessioned2025-12-18T02:30:37Z-
dc.date.available2025-12-18T02:30:37Z-
dc.date.issued2025-11-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/209898-
dc.description.abstractAs software grows in size and complexity, modular designs are increasingly adopted, leading to frequent interactions via shared memory between components. This design however increases the risk of vulnerabilities from uncontrolled memory access to shared memory. Enforcing byte-level access control can mitigate these risks by enabling byte-level permissions on complex shared objects and their sub-elements. However, existing approaches face performance limitations as they increase the granularity of control to byte level. In this paper, we present Bastag, a novel system that leverages ARM's Memory Tagging Extension (MTE) to tack this challenge. Although MTE enforces tag-matching between pointers and memory, its hardware-defined granularity is too coarse to support byte-level control on its own. To address the inherent limitations of applying MTE for nuanced access control, Bastag incorporates a technique known as shadow memory tagging that places separate, but associated MTE tags for the actual memory targets, allowing for more flexible and finer access control with efficiency. We implemented a Bastag prototype on AArch64 hardware with MTE support and evaluated it on three real-world use cases. Our results demonstrate that Bastag significantly outperforms existing byte-level access control mechanisms.-
dc.format.extent15-
dc.language영어-
dc.language.isoENG-
dc.publisherAssociation for Computing Machinery, Inc-
dc.titleBastag: Byte-level Access Control on Shared Memory using ARM Memory Tagging Extension-
dc.typeArticle-
dc.identifier.doi10.1145/3719027.3744849-
dc.identifier.scopusid2-s2.0-105023887755-
dc.identifier.wosid001657120200104-
dc.identifier.bibliographicCitationCCS 2025 - Proceedings of the 2025 ACM SIGSAC Conference on Computer and Communications Security, pp 1514 - 1528-
dc.citation.titleCCS 2025 - Proceedings of the 2025 ACM SIGSAC Conference on Computer and Communications Security-
dc.citation.startPage1514-
dc.citation.endPage1528-
dc.type.docTypeProceedings Paper-
dc.description.isOpenAccessY-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalResearchAreaTelecommunications-
dc.relation.journalWebOfScienceCategoryComputer Science, Information Systems-
dc.relation.journalWebOfScienceCategoryComputer Science, Theory & Methods-
dc.relation.journalWebOfScienceCategoryTelecommunications-
dc.subject.keywordPlusAccess control-
dc.subject.keywordPlusARM processors-
dc.subject.keywordPlusComputer hardware-
dc.subject.keywordPlusHuman computer interaction-
dc.subject.keywordPlusHuman engineering-
dc.subject.keywordPlusInformation management-
dc.subject.keywordAuthorMemory Tagging Extension-
dc.subject.keywordAuthorshadow memory-
dc.subject.keywordAuthorsoftware hardening-
dc.identifier.urlhttps://dl.acm.org/doi/10.1145/3719027.3744849-
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