Interface-driven polarization field screening in Hf0.5Zr0.5O2/poly-Si stacks for 3D ferroelectric NAND flash memory
- Authors
- Choi, Seonjun; Bang, Seungho; Namgung, Junseo; Kang, Wooyoung; Jeong, Yu-Jun; Kim, Yeongseo; Bae, Hyeongyeong; An, Chihwan; Jung, Yei Hwan; Chae, Seung Chul; Noh, Youngji; Kim, Wanki; Ha, Daewon; Jeong, Mun Seok; Song, Yun Heub
- Issue Date
- Jan-2026
- Publisher
- ELSEVIER SCIENCE SA
- Keywords
- Ferroelectricity; NAND flash; Rapid thermal annealing; Polarization field screening; Interface engineering; HZO (Hf0.5Zr0.5O2)
- Citation
- JOURNAL OF ALLOYS AND COMPOUNDS, v.1050, pp 1 - 8
- Pages
- 8
- Indexed
- SCIE
SCOPUS
- Journal Title
- JOURNAL OF ALLOYS AND COMPOUNDS
- Volume
- 1050
- Start Page
- 1
- End Page
- 8
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/210374
- DOI
- 10.1016/j.jallcom.2025.185864
- ISSN
- 0925-8388
1873-4669
- Abstract
- Three-dimensional NAND flash memory achieves high density through vertical stacking, but extreme annealing above 900 °C during bit-line formation severely degrades conventional charge-trap devices. Ferroelectric Hf0.5Zr0.5O2 (HZO) is a promising alternative due to its low operating voltage and full complementary metal-oxide-semiconductor compatibility, yet its reliability under such thermal stress remains unclear. In this study, TiN/HZO/poly-Si capacitors were annealed between 650 ℃ and 950 ℃. Structural analysis confirms that the orthorhombic Pca21 ferroelectric phase remains intact across the entire range. However, oxygen diffusion into poly-Si thickens the amorphous SiOx interlayer from ∼1 nm to ∼3 nm and reduces Hf/Zr cations to metallic states. These metallic nanodots accumulate at the HZO/SiOx interface, forming dense trap networks that screen the internal polarization field. As a result, remanent polarization collapses from > 30 µC/cm² at 650 ℃ to < 5 µC/cm² above 850 ℃. Technology computer-aided design simulations confirm that trap-induced field cancellation, not phase instability, is the dominant failure mechanism. This establishes ∼650 ℃ as the practical thermal limit for reliable integration of HZO ferroelectrics on poly-Si and highlights the urgent need for advanced interface engineering and oxygen-diffusion control in next-generation non-volatile memory technologies
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