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Investigation of convex/concave channel shaping with confined charge trap nitride for high-reliability 3D NAND flash applications

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dc.contributor.authorShin, Jeongmin-
dc.contributor.authorKim, Sohee-
dc.contributor.authorSong, Yun-Heub-
dc.date.accessioned2026-03-03T05:00:38Z-
dc.date.available2026-03-03T05:00:38Z-
dc.date.issued2026-05-
dc.identifier.issn0959-8324-
dc.identifier.issn1879-2391-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/211008-
dc.description.abstractThis study proposes a high-reliability 3D NAND flash memory structure that integrates a confined charge trap nitride (CTN) layer with convex or concave channel shaping. The confined CTN layer suppresses lateral charge migration, improving data retention, while concave channel shaping disperses the electric field into the spacer region and reduces the gap between the spacer and channel, thereby mitigating interference and read disturbance. Technology Computer-Aided Design (TCAD) simulations were performed to evaluate reliability. The convex-channel structure with a confined CTN layer showed 1.7 V charge loss at 125 °C, 126 mV interference, and 10 mV read disturbance after 5000 cycles. In contrast, the concave-channel design achieved 1.6 V charge loss, a reduced interference of 51 mV, and only 2 mV disturbance. For comparison, the CTN-only structure exhibited 1.7 V charge loss, 81 mV interference, and 4 mV disturbance. These results demonstrate that combining a confined CTN layer with concave channel shaping significantly enhances the reliability of 3D NAND flash memory.-
dc.format.extent6-
dc.language영어-
dc.language.isoENG-
dc.publisherElsevier Ltd-
dc.titleInvestigation of convex/concave channel shaping with confined charge trap nitride for high-reliability 3D NAND flash applications-
dc.typeArticle-
dc.publisher.location영국-
dc.identifier.doi10.1016/j.mejo.2026.107092-
dc.identifier.scopusid2-s2.0-105029584215-
dc.identifier.wosid001689739200001-
dc.identifier.bibliographicCitationMicroelectronics Journal, v.171, pp 1 - 6-
dc.citation.titleMicroelectronics Journal-
dc.citation.volume171-
dc.citation.startPage1-
dc.citation.endPage6-
dc.type.docTypeArticle-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaScience & Technology - Other Topics-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryNanoscience & Nanotechnology-
dc.subject.keywordPlusATOMIC LAYER DEPOSITION-
dc.subject.keywordAuthor3D NAND flash memory-
dc.subject.keywordAuthorArea-selective atomic layer deposition-
dc.subject.keywordAuthorCell-to-cell interference-
dc.subject.keywordAuthorConcave channel-
dc.subject.keywordAuthorConfined charge trap nitride-
dc.subject.keywordAuthorConvex channel-
dc.subject.keywordAuthorData retention-
dc.subject.keywordAuthorRead disturbance-
dc.identifier.urlhttps://www.sciencedirect.com/science/article/pii/S1879239126000482?via%3Dihub-
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