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ProactivePIM: Accelerating Weight-Sharing Embedding Layer with PIM for Scalable Recommendation System
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kim, Youngsuk | - |
| dc.contributor.author | Lim, Junghwan | - |
| dc.contributor.author | Lee, Hyuk-Jae | - |
| dc.contributor.author | Rhee, Chae Eun | - |
| dc.date.accessioned | 2026-03-24T04:30:32Z | - |
| dc.date.available | 2026-03-24T04:30:32Z | - |
| dc.date.issued | 2025-12 | - |
| dc.identifier.issn | 2169-3536 | - |
| dc.identifier.issn | 2169-3536 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/211511 | - |
| dc.description.abstract | Although deep learning-based personalized recommendation systems provide qualified recommendations, they strain data center resources. The main bottleneck is the embedding layer, which is highly memory-intensive due to its sparse, irregular access patterns to embeddings. Recent near-memory processing (NMP) and processing-in-memory (PIM) architectures have addressed these issues by exploiting parallelism within memory. However, as model sizes increase year by year and can exceed server capacity, inference on single-node servers becomes challenging, necessitating the integration of model compression. Various algorithms have been proposed for model size reduction, but they come at the cost of increased memory access and CPU–PIM communication. We present ProactivePIM, a PIM system tailored for weight-sharing algorithms, a family of compression methods that decompose an embedding table into compact subtables, such as QR-trick and TT-Rec. Our analysis shows that embedding layer execution with weight-sharing algorithms increases memory access and incurs CPU–PIM communication. We also find that these algorithms exhibit unique data locality characteristics, which we name intra-GnR locality. ProactivePIM accelerates weight-sharing algorithms by utilizing a heterogeneous HBM-DIMM memory architecture with integration of a two-level PIM system of base-die PIM (bd-PIM) and bank-group PIM (bg-PIM) inside the HBM. To gain further speedup, ProactivePIM prefetches embeddings with high intra-GnR locality into an SRAM cache within bg-PIM and eliminates the CPU-PIM communication through duplication of target subtables across bank groups. With additional optimization techniques, our design effectively accelerates weight-sharing algorithms, achieving 2.22× and 2.15× speedup in QR-trick and TT-Rec, respectively, compared to the baseline architecture. | - |
| dc.format.extent | 15 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
| dc.title | ProactivePIM: Accelerating Weight-Sharing Embedding Layer with PIM for Scalable Recommendation System | - |
| dc.type | Article | - |
| dc.publisher.location | 미국 | - |
| dc.identifier.doi | 10.1109/ACCESS.2025.3648766 | - |
| dc.identifier.scopusid | 2-s2.0-105026014545 | - |
| dc.identifier.wosid | 001655707600007 | - |
| dc.identifier.bibliographicCitation | IEEE ACCESS, v.14, pp 245 - 259 | - |
| dc.citation.title | IEEE ACCESS | - |
| dc.citation.volume | 14 | - |
| dc.citation.startPage | 245 | - |
| dc.citation.endPage | 259 | - |
| dc.type.docType | Article | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Computer Science | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalResearchArea | Telecommunications | - |
| dc.relation.journalWebOfScienceCategory | Computer Science, Information Systems | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.relation.journalWebOfScienceCategory | Telecommunications | - |
| dc.subject.keywordPlus | Cache memory | - |
| dc.subject.keywordPlus | Compaction | - |
| dc.subject.keywordPlus | Deep learning | - |
| dc.subject.keywordPlus | Embeddings | - |
| dc.subject.keywordPlus | Memory architecture | - |
| dc.subject.keywordPlus | Program processors | - |
| dc.subject.keywordPlus | Static random access storage | - |
| dc.subject.keywordAuthor | Recommender systems | - |
| dc.subject.keywordAuthor | Inference algorithms | - |
| dc.subject.keywordAuthor | Servers | - |
| dc.subject.keywordAuthor | Vectors | - |
| dc.subject.keywordAuthor | Throughput | - |
| dc.subject.keywordAuthor | Accuracy | - |
| dc.subject.keywordAuthor | Prefetching | - |
| dc.subject.keywordAuthor | Random access memory | - |
| dc.subject.keywordAuthor | Model compression | - |
| dc.subject.keywordAuthor | Hash functions | - |
| dc.subject.keywordAuthor | Processing-in-memory | - |
| dc.subject.keywordAuthor | memory system | - |
| dc.subject.keywordAuthor | personalized recommendation systems | - |
| dc.subject.keywordAuthor | embedding layer | - |
| dc.subject.keywordAuthor | model compression | - |
| dc.identifier.url | https://ieeexplore.ieee.org/document/11316485 | - |
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