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Nonlinear quantized conductance dynamics in vertical SiN RRAM for scalable memory-learning integration
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Park, Jihee | - |
| dc.contributor.author | Kim, Nawoon | - |
| dc.contributor.author | Na, Hyesung | - |
| dc.contributor.author | Kim, Hyungjin | - |
| dc.contributor.author | Kim, Sungjun | - |
| dc.date.accessioned | 2026-03-24T06:00:28Z | - |
| dc.date.available | 2026-03-24T06:00:28Z | - |
| dc.date.issued | 2026-09 | - |
| dc.identifier.issn | 1005-0302 | - |
| dc.identifier.issn | 1941-1162 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/211536 | - |
| dc.description.abstract | We report a vertical resistive random-access memory device based on a Pt/SiN/Ti stack, designed for multi-bit storage and neuromorphic computing. The device exhibits stable bipolar switching and achieves up to 7-bit (128-level) conductance states through precise control of compliance current and reset voltage. Quantized conductance plateaus, corresponding to integer and half-integer multiples of the quantum conductance G<inf>0</inf> = 2e2/h, reveal atomic-scale filament dynamics governed by nonlinear conduction processes. Diverse synaptic plasticity functions, including spike-number-, spike-rate-, spike-duration-, and spike-amplitude-dependent plasticity, were experimentally emulated. Neuromorphic simulations for the Modified National Institute of Standards and Technology dataset achieved classification accuracies exceeding 94 %, confirming the device's suitability for high-precision weight modulation. The vertical architecture ensures scalability toward three-dimensional integration, while robust retention and compatibility with current-based multi-bit modulation highlight its potential for complex-system-inspired edge AI and in-memory computing hardware. | - |
| dc.format.extent | 16 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | ELSEVIE | - |
| dc.title | Nonlinear quantized conductance dynamics in vertical SiN RRAM for scalable memory-learning integration | - |
| dc.type | Article | - |
| dc.publisher.location | 네델란드 | - |
| dc.identifier.doi | 10.1016/j.jmst.2025.11.034 | - |
| dc.identifier.scopusid | 2-s2.0-105026656778 | - |
| dc.identifier.wosid | 001666594200001 | - |
| dc.identifier.bibliographicCitation | JOURNAL OF MATERIALS SCIENCE & TECHNOLOGY, v.266, pp 76 - 91 | - |
| dc.citation.title | JOURNAL OF MATERIALS SCIENCE & TECHNOLOGY | - |
| dc.citation.volume | 266 | - |
| dc.citation.startPage | 76 | - |
| dc.citation.endPage | 91 | - |
| dc.type.docType | Article | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Materials Science | - |
| dc.relation.journalResearchArea | Metallurgy & Metallurgical Engineering | - |
| dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
| dc.relation.journalWebOfScienceCategory | Metallurgy & Metallurgical Engineering | - |
| dc.subject.keywordPlus | RANDOM-ACCESS MEMORY | - |
| dc.subject.keywordPlus | RESISTIVE SWITCHING CHARACTERISTICS | - |
| dc.subject.keywordPlus | LOW-POWER | - |
| dc.subject.keywordPlus | ARCHITECTURE | - |
| dc.subject.keywordPlus | DEVICES | - |
| dc.subject.keywordPlus | EVOLUTION | - |
| dc.subject.keywordPlus | MECHANISMS | - |
| dc.subject.keywordPlus | TRAP | - |
| dc.subject.keywordPlus | HFOX | - |
| dc.subject.keywordAuthor | Vertical rram | - |
| dc.subject.keywordAuthor | Conductance quantization | - |
| dc.subject.keywordAuthor | Multi-bit memory | - |
| dc.subject.keywordAuthor | Neuromorphic computing | - |
| dc.subject.keywordAuthor | Synaptic plasticity | - |
| dc.identifier.url | https://www.sciencedirect.com/science/article/pii/S100503022501182X?via%3Dihub | - |
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