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Uncertainty-Aware Performance Evaluation of Low-Noise Amplers via Generalized Polynomial Chaos Expansion-Based Surrogate Model

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dc.contributor.authorShin, Hoyeon-
dc.contributor.authorKim, Taeyeong-
dc.contributor.authorChung, Jiyong-
dc.contributor.authorCho, Moon-Kyu-
dc.contributor.authorHong, Songnam-
dc.contributor.authorSong, Ickhyun-
dc.date.accessioned2026-07-24T06:00:08Z-
dc.date.available2026-07-24T06:00:08Z-
dc.date.issued2026-02-
dc.identifier.issn2837-4576-
dc.identifier.issn2768-3516-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/219635-
dc.description.abstractStatistical performance analysis of low-noise amplifiers (LNA) under process, voltage, and temperature (PVT) variations and device mismatches is crucial for ensuring design robustness. Unfortunately, traditional Monte Carlo (MC) analysis is often computationally prohibitive for complex R F circuits. In this work, a generalized polynomial chaos expansion (gPCE) model is constructed as a surrogate model from a limited set of circuit simulations to approximate a comprehensive figure-of-merit (FoM). The results demonstrate that the third-order gPCE model achieves high predictive accuracy, confirmed by a high coefficient of determination (R2=0. 9 2 5) and a low root mean squared error (RMSE =0.007). In addition, the proposed model enables the extraction of these statistical moments and tail-risk metrics over 26 times faster than the benchmark MC simulation.-
dc.format.extent5-
dc.language영어-
dc.language.isoENG-
dc.publisherInstitute of Electrical and Electronics Engineers Inc.-
dc.titleUncertainty-Aware Performance Evaluation of Low-Noise Amplers via Generalized Polynomial Chaos Expansion-Based Surrogate Model-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1109/APCCAS67402.2025.11377410-
dc.identifier.scopusid2-s2.0-105035389531-
dc.identifier.wosid001740055700120-
dc.identifier.bibliographicCitationProceedings - 2025 21st IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2025, pp 1 - 5-
dc.citation.titleProceedings - 2025 21st IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2025-
dc.citation.startPage1-
dc.citation.endPage5-
dc.type.docTypeConference paper-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryComputer Science, Hardware & Architecture-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.subject.keywordPlusCircuit simulation-
dc.subject.keywordPlusExpansion-
dc.subject.keywordPlusIntelligent systems-
dc.subject.keywordPlusLow noise amplifiers-
dc.subject.keywordPlusMean square error-
dc.subject.keywordPlusMonte Carlo methods-
dc.subject.keywordPlusPolynomials-
dc.subject.keywordPlusRisk assessment-
dc.subject.keywordPlusUncertainty analysis-
dc.subject.keywordAuthorgeneralized polynomial chaos expansion-
dc.subject.keywordAuthorlow-noise amplifier-
dc.subject.keywordAuthorrisk analysis-
dc.subject.keywordAuthorsurrogate model-
dc.subject.keywordAuthoruncertainty quantification-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/11377410-
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